Xilinx RocketIO User Manual

Also see for RocketIO: User guide User guide User guide

Contents

Xilinx RocketIO User Manual Manual pdf 76 page image

76 www.xilinx.com RocketIO™ Transceiver User Guide1-800-255-7778 UG024 (v2.3.2) June 24, 2004Chapter 2: Digital Design ConsiderationsRCLK_COR_INSERT_IDLE_FLAG is a TRUE/FALSE attribute that defines the output of theRXRUNDISP port. When set to TRUE, RXRUNDISP is raised for the first byte of each inserted(repeated) clock correction sequence (8B/10B decoding enabled). When set to FALSE (default),RXRUNDISP denotes the running disparity of RXDATA (8B/10B decoding enabled).CLK_COR_KEEP_IDLE is a TRUE/FALSE attribute that controls whether or not the final bytestream must retain at least one clock correction sequence. When set to FALSE (default), the clockcorrection logic is allowed to remove all clock correction sequences if needed to recenter the elasticbuffer. When set to TRUE, it forces the clock correction logic to retain at least one clock correctionsequence per continuous stream of clock correction sequences.Example: Elastic buffer is 75% full and clock correction is needed. (IDLE is the defined clockcorrection sequence.)Data stream written into elastic buffer:Data stream read out of elastic buffer (CLK_COR_KEEP_IDLE = FALSE)Data stream read out of elastic buffer (CLK_COR_KEEP_IDLE = TRUE)CLK_COR_REPEAT_WAIT is an integer attribute (0-31) that controls frequency of repetition ofclock correction operations. This attribute specifies the minimum number of RXUSRCLK cycleswithout clock correction that must occur between successive clock corrections. For example, if thisattribute is 3, then at least three RXUSRCLK cycles without clock correction must occur beforeanother clock correction sequence can occur. If this attribute is 0, no limit is placed on howfrequently clock correction can occur.Example: Elastic buffer is 25% full, clock correction is needed, and one sequence is repeated perclock correction. (IDLE is the defined clock correction sequence.)Data stream written into elastic buffer:Data stream read out of elastic buffer (CLK_COR_REPEAT_WAIT = 0):Data stream read out of elastic buffer (CLK_COR_REPEAT_WAIT = 1):The percent that the buffer is full, together with the value of CLK_COR_REPEAT_WAIT,determines how many times the clock correction sequence is repeated during each clock correction.Synchronization LogicOverviewFor some applications, it is beneficial to know if incoming data is valid or not, and if the MGT issynchronized on the data. For applications using the 8B/10B encoding scheme, theD0 IDLE IDLE IDLE IDLE D1 D2D0 D1 D2D0 IDLE D1 D2D0 IDLE IDLE IDLE D1 D2D0 IDLE IDLE IDLE IDLE IDLE IDLE D1 D2D0 IDLE IDLE IDLE IDLE IDLE D1 D2