Spartan-3A/3AN Starter Kit Board User Guide www.xilinx.com 123UG334 (v1.0) May 28, 2007Hirose 100-Pin FX2 Edge Connector (J17)RA separate supply provides the same voltage as that applied to the FPGA’s I/O Banks 0, 1,and 2 called VCCO_012. This supply is 3.3V by default. All FPGA I/Os that interface to theHirose connector are in Bank 0 or Bank 1.For improved signal integrity, a majority of pins on the B side of the FX2 connector are tiedto GND.Connector Pinout and FPGA ConnectionsTable 15-1 shows the pinout for the Hirose 100-pin FX2 connector and the associated FPGApin connections. The FX2 connect has two rows of connectors, both with 50 connectionseach, shown in the table using light yellow shading.The pin assignment for the connector is identical to that used on the Spartan-3E Starter Kitboard, although the Spartan-3E board pinout includes a few input-only pins. The Spartan-3A/3AN Starter Kit board pin assignment uses only full I/O pins and are backwardscompatible with the Spartan-3E Starter Kit board.aTable 15-1: Hirose 100-Pin FX2 Connector Pinout and FPGA Connections (J17)Signal Name FPGA PinShared FX2 ConnectorFPGAPin Signal NameJ34 A (top)B(bottom)Supply to FPGAI/O Banks 0, 1, 2VCCO_012 1 1 SHIELDVCCO_012 2 2 GND GNDTMS_B 3 3 TDO_XC2CJTSEL 4 4 TCK_BTDO_FX2 5 5 GND GNDFX2_IO1 A13 6 6 GND GNDFX2_IO2 B13 7 7 GND GNDFX2_IO3 A14 8 8 GND GNDFX2_IO4 B15 9 9 GND GNDFX2_IO5 A15 10 10 GND GNDFX2_IO6 A16 11 11 GND GNDFX2_IO7 A17 12 12 GND GNDFX2_IO8 B17 13 13 GND GNDFX2_IO9 A18 14 14 GND GNDFX2_IO10 C18 15 15 GND GNDFX2_IO11 A19 16 16 GND GNDFX2_IO12 B19 17 17 GND GNDFX2_IO13 A20 18 18 GND GNDFX2_IO14 B20 19 19 GND GNDFX2_IO15 C19 20 20 GND GNDFX2_IO16 D19 21 21 GND GNDFX2_IO17 D18 22 22 GND GNDFX2_IO18 E17 23 23 GND GNDFX2_IO19 D20 24 24 GND GNDFX2_IO20 D21 25 25 GND GNDFX2_IO21 D22 26 26 GND GNDFX2_IO22 E22 27 27 GND GND
