Eaton PDI WaveStar TFA Static Transfer Switch Installation and Operation Manual P-164001113—Rev 01 13Figure 8. STS on Bypass (Bypass 1)22..66 HHiigghh AAvvaaiillaabbiilliittyy tthhrroouugghh RReedduunnddaannccyy• The STS is designed for an MTBF exceeding 2,000,000 hours.• The STS has dynamic tri-redundant logic with voting circuits. Each level monitors the power beingsupplied to the load; if one level does not transfer the load in specified times, the second level will transferthe load within the CBEMA curve.• The STS has quad-redundant gate drivers, redundant drivers for each set of SCRs. The drivers cannotinhibit or out vote the other. Therefore, both source 1 and source 2 SCRs have two levels of isolated,independent gate drivers.• The STS has tri-redundant logic power supplies. The configuration of each DC logic power supply issuch that a short circuit on one PCB cannot prevent the other PCBs from receiving tri-redundant power.Each PCB receives logic power via three isolated connectors.• The STS has N+3 fan redundancy for forced air-cooling of the SCRs.• The STS uses tri-redundant fiber optic lite pipes and circular redundant CAN Bus to route logic signalsbetween logic PCBs.• Noise immune signal buses: the STS uses optical buses and/or CAN buses to route signals betweenlogic PCBs.– All signal buses are tri-redundant.– Each signal bus continuously transmits “bus integrity” signals, when not transmitting true data. If the“bus integrity” signals are not received by all receivers, then that bus is considered discontinuous andis alarmed.– The CAN Bus has circular redundancy so that there are two paths. One path can be severed andsignals will continue to flow via the other path.• The STS has two levels of operator controls and status displays. The Monitor and display is backed up bythe Redundant Operator Interface (ROI).System Description