12.3.9 Channel Value High (FTMx_CnVH)These registers contain the captured FTM counter value of the input capture function orthe match value for the output modes.In input capture mode, reading a single byte in CnV latches the contents into a bufferwhere they remain latched until the other byte is read. This latching mechanism alsoresets, or becomes unlatched, when the CnSC register is written whether BDM mode isactive or not. Any write to the channel registers is ignored during this mode.When BDM is active, the read coherency mechanism is frozen such that the bufferlatches remain in the state they were in when the BDM became active, even if one or bothbytes of the channel value register are read while BDM is active. This ensures that if youwere in the middle of reading a 16-bit register when BDM became active, it reads theappropriate value from the other half of the 16-bit value after returning to normalexecution. Any read of the CnV registers in BDM mode bypasses the buffer latches andreturns the value of these registers and not the value of their read buffer.In output modes, writing to CnV latches the value into a buffer. The registers are updatedwith the value of their write buffer according to Update of the registers with writebuffers.This write coherency mechanism may be manually reset by writing to the CnSC registerwhether BDM mode is active or not.When BDM is active, the write coherency mechanism is frozen such that the bufferlatches remain in the state they were in when the BDM became active even if one or bothbytes of the channel value register are written while BDM is active. Any write to the CnVregisters bypasses the buffer latches and writes directly to the register while BDM isactive. The values written to the channel value registers while BDM is active are used inoutput modes operation after normal execution resumes. Writes to the channel valueregisters while BDM is active do not interfere with the partial completion of a coherencysequence. After the write coherency mechanism has been fully exercised, the channelvalue registers are updated using the buffered values while BDM was not active.Address: Base address + 6h offset + (3d × i), where i=0d to 1dBit 7 6 5 4 3 2 1 0Read VAL_HWriteReset 0 0 0 0 0 0 0 0FTMx_CnVH field descriptionsField DescriptionVAL_H Channel Value High ByteChapter 12 FlexTimer Module (FTM)MC9S08PA4 Reference Manual, Rev. 5, 08/2017NXP Semiconductors 243
