Section number Title Page4.6.2 Flash Security Register (NVM_FSEC)............................................................................................................874.6.3 Flash CCOB Index Register (NVM_FCCOBIX)............................................................................................ 884.6.4 Flash Configuration Register (NVM_FCNFG)............................................................................................... 884.6.5 Flash Error Configuration Register (NVM_FERCNFG).................................................................................894.6.6 Flash Status Register (NVM_FSTAT).............................................................................................................904.6.7 Flash Error Status Register (NVM_FERSTAT).............................................................................................. 914.6.8 Flash Protection Register (NVM_FPROT)......................................................................................................924.6.9 EEPROM Protection Register (NVM_EEPROT)............................................................................................934.6.10 Flash Common Command Object Register:High (NVM_FCCOBHI)............................................................ 944.6.11 Flash Common Command Object Register: Low (NVM_FCCOBLO)...........................................................954.6.12 Flash Option Register (NVM_FOPT)..............................................................................................................95Chapter 5Interrupt5.1 Interrupts......................................................................................................................................................................... 975.1.1 Interrupt stack frame........................................................................................................................................ 985.1.2 Interrupt vectors, sources, and local masks......................................................................................................995.1.3 Hardware nested interrupt................................................................................................................................ 1015.1.3.1 Interrupt priority level register......................................................................................................... 1035.1.3.2 Interrupt priority level comparator set............................................................................................. 1045.1.3.3 Interrupt priority mask update and restore mechanism....................................................................1045.1.3.4 Integration and application of the IPC............................................................................................. 1055.2 IRQ..................................................................................................................................................................................1055.2.1 Features............................................................................................................................................................ 1065.2.1.1 Pin configuration options................................................................................................................. 1065.2.1.2 Edge and level sensitivity................................................................................................................ 1075.3 Interrupt pin request register...........................................................................................................................................1075.3.1 Interrupt Pin Request Status and Control Register (IRQ_SC)......................................................................... 1085.4 Interrupt priority control register.................................................................................................................................... 1095.4.1 IPC Status and Control Register (IPC_SC)......................................................................................................110MC9S08PA4 Reference Manual, Rev. 5, 08/2017NXP Semiconductors 5
