NuMicro™ Mini51 Technical Reference ManualFeb 9, 2012 Page 23 of 342 Revision V1.03NUMICRO™ MINI51 TECHNICAL REFERENCE MANUAL5.1.2 System Memory MapThe memory locations assigned to each on-chip controllers are shown in the following table.Address Space Token ControllersFlash and SRAM Memory Space0x0000_0000 – 0x0000_3FFF FLASH_BA Flash Memory Space (16 KB)0x2000_0000 – 0x2000_07FF SRAM_BA SRAM Memory Space (2 KB)AHB Controllers Space (0x5000_0000 – 0x501F_FFFF)0x5000_0000 – 0x5000_01FF GCR_BA Global Control Registers0x5000_0200 – 0x5000_02FF CLK_BA Clock Control Registers0x5000_0300 – 0x5000_03FF INT_BA Interrupt Multiplexer Control Registers0x5000_4000 – 0x5000_7FFF GP_BA GPIO Control Registers0x5000_C000 – 0x5000_FFFF FMC_BA Flash Memory Control RegistersAPB1 Controllers Space (0x4000_0000 – 0x401F_FFFF)0x4000_4000 – 0x4000_7FFF WDT_BA Watchdog Timer Control Registers0x4001_0000 – 0x4001_3FFF TMR_BA Timer0/Timer1 Control Registers0x4002_0000 – 0x4002_3FFF I2C_BA I2C Interface Control Registers0x4003_0000 – 0x4003_3FFF SPI_BA SPI Control Registers0x4004_0000 – 0x4004_3FFF PWM_BA PWM Control Registers0x4005_0000 – 0x4005_3FFF UART_BA UART Control Registers0x400D_0000 – 0x400D_3FFF CMP_BA Analog Comparator Control Registers0x400E_0000 – 0x400E_3FFF ADC_BA Analog-Digital-Converter (ADC) Control RegistersSystem Controllers Space (0xE000_E000 – 0xE000_EFFF)0xE000_E010 – 0xE000_E0FF SCS_BA System Timer Control Registers0xE000_E100 – 0xE000_ECFF SCS_BA Nested Vectored Interrupt Control Registers0xE000_ED00 – 0xE000_ED8F SCB_BA System Control Block RegistersTable 5.1-1 Address Space Assignments for On-Chip Modules
