NuMicro™ Mini51 Technical Reference ManualFeb 9, 2012 Page 236 of 342 Revision V1.03NUMICRO™ MINI51 TECHNICAL REFERENCE MANUALSPICLKMOSISlave Mode: CNTRL[SLAVE]=1, CNTRL[LSB]=1, CNTRL[Tx_NUM]=0x01, CNTRL[Tx_BIT_LEN]=0x08MISO Tx0[1] Tx0[7] Tx1[0] Tx1[6] MSBTx1[7]LSBTx0[0]CLKP=0CLKP=1SPISSSS_LVL=1SS_LVL=01. CNTRL[CLKP]=0, CNTRL[Tx_NEG]=0, CNTRL[Rx_NEG]=1 or2. CNTRL[CLKP]=1, CNTRL[Tx_NEG]=1, CNTRL[Rx_NEG]=0Rx0[1] Rx0[7] Rx1[0] Rx1[6] MSBRx1[7]LSBRx0[0]Figure 5.11-12 SPI Timing in Slave Mode (Alternate Phase of SPICLK)5.11.4.17 SPI Programming ExamplesExample 1: The SPI controller is set as a master to access an off-chip slave device with followingspecifications: Data bit is latched on positive edge of serial clock. Data bit is driven on negative edge of serial clock. Data bit is transferred from MSB first. SPICLK idles at low state. Only one byte data is transmitted/received in a transfer. Slave select signal is active low.Basically, the specification of the connected off-chip slave device should be referred in detailbefore the following steps:1) Write a divisor into the DIVIDER (SPI_DIVIDER[15:0]) register to determine the outputfrequency of serial clock.2) Write the SPI_SSR register a proper value for the related settings of Master mode.1. Enable the Automatic Slave Select bit ASS (SPI_SSR[3] = 1).2. Select low level trigger output of slave select signal in the Slave Select ActiveLevel bit SS_LVL (SPI_SSR[2] = 0).3. Select slave select signal to be output active at the I/O pin by setting therespective Slave Select Register bits SSR (SPI_SSR[0]) to active the off-chipslave devices.3) Write the related settings into the SPI_CNTRL register to control the SPI master
