NuMicro™ Mini51 Technical Reference ManualFeb 9, 2012 Page 254 of 342 Revision V1.03NUMICRO™ MINI51 TECHNICAL REFERENCE MANUAL signal is generated depending on TDR = TCMPR if IE is enabled. User can change differentTCMPR value immediately without disabling timer counting and restarting timer counting. Forexample, TCMPR is set as 80, first. (The TCMPR should be less than 224 -1 and be greater than1). The timer generates the interrupt if IE is enabled and TIF (timer interrupt flag) will set to “1”then the interrupt signal is generated and sent to NVIC to inform CPU when TDR value is equal to80 and. But the CEN is kept at “1” (counting enable continuously) and TDR value will not go backto “0”, It continues to count 81, 82, 83, … to 224 -1, 0, 1, 2, 3, … to 224 -1 again and again. Next, ifuser programs TCMPR as 200 and the TIF is cleared to “0”, then timer interrupt occurred and TIFis set to “1”, then the interrupt signal is generated and sent to NVIC to inform CPU again whenTDR value reaches to 200. At last, user programs TCMPR as 500 and clears TIF to “0” again, thentimer interrupt occurred and TIF sets to “1” then the interrupt signal is generated and sent to NVICto inform CPU when TDR value reaches to 500. From application view, the interrupt is generateddepending on TCMPR. In this mode, the timer counting is continuous. Thus, this operation modeis called as continuous counting mode.0TIF = 1 and InterruptGenerationTIF = 1 and InterruptGenerationTIF = 1 and InterruptGenerationSet TCMPR = 80TDR100 200 300 400 500 224 - 1TDR from 224 to 0Clear TIF as 0and Set TCMPR= 200Clear TIF as 0and Set TCMPR= 500Clear TIF as 0and Set TCMPR= 80Figure 5.12-3 Continuous Counting Mode5.12.4.5 Event Counting FunctionThe event counting mode can count the event from T0~T1 pins. In event counting mode, the clocksource of timer controller, TMRx_CLK, as shown in Figure 5.12-2, should be set as HCLK. Also, theevent count source operating frequency should be less than 1/3 HCLK frequency if counting de-bounceis disabled or there‟s less than 1/8 HCLK frequency if counting de-bounce is enabled. Otherwise, thereturned TDR value is incorrect. It provides T0~T1 enabled or disabled de-bounce function byTEXCON[7] and T0~T1 falling or rising phase counting setting by TEXCON[0].5.12.4.6 Input Capture FunctionThe input capture or reset function is provided to capture or reset timer counter value. The capturefunction with free-counting capture mode and trigger-counting capture mode are configured byCAP_MODE (TEXCON[8]). The free-counting capture mode, reset mode, trigger-counting capturemode are described as follows.
