NuMicro™ Mini51 Technical Reference ManualFeb 9, 2012 Page 310 of 342 Revision V1.03NUMICRO™ MINI51 TECHNICAL REFERENCE MANUAL6.2 Features A low gate count processor ARMv6-M Thumb® instruction set Thumb-2 technology ARMv6-M compliant 24-bit SysTick timer A 32-bit hardware multiplier Supports little-endian data accesses Deterministic, fixed-latency, interrupt handling Load/store-multiples and multicycle-multiplies that can be abandoned andrestarted to facilitate rapid interrupt handling C Application Binary Interface compliant exception model:ARMv6-M, C Application Binary Interface (C-ABI) compliant exception modelthat enables the use of pure C functions as interrupt handlers Low power Idle mode entry using Wait For Interrupt (WFI), Wait For Event (WFE)instructions, or the return from interrupt sleep-on-exit feature NVIC 32 external interrupt inputs, each with four levels of priority Dedicated Non-Maskable Interrupt (NMI) input Supports both level-sensitive and pulse-sensitive interrupt lines Wake-up Interrupt Controller (WIC) with ultra-low power Idle mode support Debug support Four hardware breakpoints Two watchpoints Program Counter Sampling Register (PCSR) for non-intrusive code profiling Single step and vector catch capabilities Bus interfaces Single 32-bit AMBA-3 AHB-Lite system interface that provides simple integrationto all system peripherals and memory Single 32-bit slave port that supports the Debug Access Port DAP (DAP)
