NuMicro™ Mini51 Technical Reference ManualFeb 9, 2012 Page 27 of 342 Revision V1.03NUMICRO™ MINI51 TECHNICAL REFERENCE MANUAL5.2.5 NVIC OperationNVIC interrupts can be enabled or disabled by writing to their corresponding Interrupt Set-Enableor Interrupt Clear-Enable register bit-field. The registers use a write-1-to-enable and write-1-to-clear policy, and both registers reading back the current enabled state of the correspondinginterrupts. When an interrupt is disabled, interrupt assertion will cause the interrupt to becomePending; however, the interrupt will not be activated. If an interrupt is Active when it is disabled, itremains in its Active state until cleared by reset or an exception return. Clearing the enable bitprevents new activations of the associated interrupt.NVIC interrupts can be pended/un-pended using a complementary pair of registers to those usedto enable/disable the interrupts, named the Set-Pending Register and Clear-Pending Registerrespectively. The registers use a write-1-to-enable and write-1-to-clear policy, both registersreading back the current pended state of the corresponding interrupts. The Clear-PendingRegister has no effect on the execution status of an Active interrupt.NVIC interrupts are prioritized by updating an 8-bit field within a 32-bit register (each registersupporting four interrupts).The general registers associated with the NVIC are all accessible from a block of memory in theSystem Control Space and will be described in the next section.
