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MultiLINX DLC4
Xilinx MultiLINX Series Hardware User's Manual
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Xilinx MultiLINX Series Hardware User's Manual
Table of content
Contents
about this manual
Table Of Contents
Table Of Contents
Table Of Contents
Table Of Contents
Cable Overview
Parallel Cable
Cable Limitations
Previous Cable Versions
Cable Baud Rates
External Power for the MultiLINX Cable
Parallel Cable III
Flying Leads
Configuring CPLDs With the Parallel Cable III
Configuring FPGAs With the Parallel Cable III
XChecker Cable
XChecker Baud Rates
Configuring FPGAs With the XChecker Cable
Pin Connection Considerations
Cable Connection Procedure
Setting Up The Cable
Additional MultiLINX Documentation
MultiLINX Platform Support
MultiLINX Baud Rates
Device Configuration Modes
Downloading Configuration Data or Verification of Data
Downloading Configuration Data
Downloading/Verification of Configuration Data
Slave Serial Mode (Spartan, XC5200, XC4000)
SelectMAP Mode (Virtex)
SelectMAP Mode (Virtex with Asynchronous Probing)
JTAG Mode (XC9000, Virtex, Spartan, XC5200, XC4000)
Verification of Configuration Data Only
Synchronous Probing
Demonstration Board Overview
Download Cable Support
General Components
V Power Connector (J9)
Unregulated Power Input (J12)
RESET Pushbutton (SW4)
Seven-Segment Displays (U6, U7, U8)
LED Indicators (D1-D8, D9-D16)
I/O Line Connections
XC4003E Components
XC4003E FPGA and Socket (U5)
XC4003E Probe Points
M0, M1, M2-Mode Pins (SW2-4,5,6)
Jumper J7 and Tiepoints J10 (1-3)
XC3020A Components
XC3020A FPGA and Socket (U4)
MPE-Multiple Program Enable (SW1-2)
MCLK-Master Clock (SW1-7)
Serial PROM Socket (U1)
Mode Switch Settings
Demonstration Board Operation
Design Downloading Checklist
Loading with a Configuration PROM
Starting Hardware Debugger
Tutorials
Printed Circuit Board (PCB)
Demonstration Board Schematics
Foundation Design Tutorial
Schematic With VHDL Macro Design
Example 2: VHDL Design Entry
Hardware User Guide — Alliance 3.1i
Printed in U.S.A.
Hardware User
Guide
Cable Hardware
MutliLINX
™
Cable
FPGA Design Demonstra-
tion Board
CPLD Design Demonstra-
tion Board
Glossary
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Related manuals for Xilinx MultiLINX DLC4
Xilinx Alveo U50 User Manual
Xilinx MultiLINX Getting Started
Xilinx Virtex-6 FPGA Getting Started Manual
This manual is suitable for:
MultiLINX DLC4
MultiLINX DLC5
MultiLINX DLC6
MultiLINX Series
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