Hardware User Guide3-20 Xilinx Development SystemFigure 3-8 Configuration Switch SW1MPE-Multiple Program Enable (SW1-2)When MPE is on and SPE is off, the configuration PROM (U1) is resetby the RESET pushbutton (SW4). Configuration must be set to themaster serial mode. After a Reset or powerup, the first bitstreamstored in the serial PROM is loaded into the XC3020A FPGA. IF youpress RESET, the serial PROM address pointer is reset. If you pressPROG (SW6), the XC3020A is loaded with the first bitstream again. Ifyou press PROG, and do not press RESET, the XC3020A is loadedwith the next bitstream stored in the serial PROM. The number ofbitstreams that can be sequentially loaded is limited by the size of theserial PROM.SPE-Single Program Enable (SW1-3)When SPE is on and MPE is off, the configuration PROM (U1) is resetby the XC3020A’s INIT output, which is driven Low whenever youpress PROG (SW6). The first bitstream stored in the serial PROM isloaded into the XC3020A FPGA.Note MPE and SPE must not be on at the same time. MPE and SPEare only used in conjunction with the serial PROMs. The serialPROMs must be configured as OE/RESET to allow MPE and SPE tofunction properly.M0, M1, M2-Mode Pins (SW1-4,5,6)To configure the XC3020A using the XChecker/Parallel Cable IIIthese switches must be on. This places the FPGA in slave serial mode.X46911KXC3020A1K4.7KSW1-1+5VXC4003E
