Xilinx MultiLINX Series Hardware User's Manual
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Hardware User Guide3-14 Xilinx Development SystemXC4003E Probe PointsAll pins of the XC4003E connect to the headers that surround theFPGA socket. These pins provide convenient points for probingsignals or making wirewrap connections to other circuitry, includingthe prototype area. Pin numbering increases from the inside row tothe outside, counterclockwise. See the corners of each header for thestarting number of that header.XC4003E Configuration Switches (SW2)The following sections describe each of the SW2 switches. For moreinformation on configuring the XC40003E device, see the “ModeSwitch Settings” section.PWR-Power (SW2–1)This switch turns the unregulated power input on or off to the +5 Vregulator U3.MPE-Multiple Program Enable (SW2-2)With MPE turned on and SPE turned off, the configuration PROM(U2) is reset by the RESET pushbutton (SW4). Configuration modemust be set to master-serial. After a Reset or powerup, the firstbitstream stored in the serial PROM is loaded into the XC4003E.Pressing RESET resets the serial PROM address pointer. PressingPROG (SW6) loads the XC4003E with the first bitstream again. If youpress PROG without pressing RESET, the XC4003E is loaded with thenext bitstream that is stored in the serial PROM. The size of the serialPROM limits the number of bitstreams that can be sequentiallyloaded.SPE-Single Program Enable (SW2-3)With SPE turned on and MPE turned off, the configuration PROM(U2) is reset by the XC4003E’s INIT output, which is driven Lowwhenever you press PROG (SW6). The first bitstream stored in theserial PROM is loaded into the XC4003E.Note MPE and SPE must not be on at the same time, one must be offwhen the other is on. MPE and SPE are only used in conjunction with |
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