FPGA Design Demonstration BoardHardware User Guide 3-23Jumper J5 allows the XChecker Cable signal RST on J1-17 to drive thereset line on the demonstration board. Tiepoint pins jumper thefollowing XChecker Cable signals into your circuit. Tiepoint J3-1connects to TRIG on J1-6; Tiepoint J3-2 connects to CLK1 on J1-16;and, Tiepoint J3-3 connects to CLK0 on J1-18. See the preceding tablefor more information on cable connections.Serial PROM Socket (U1)This serial PROM configures the XC3020A. You must use the masterserial mode to configure from the serial PROM.Relaxation Oscillator Components (R1 C5, R2 C6)R1, C5 and R2, C6 are two RC networks that connect to the XC3020Aat pins 12 and 14. These RC networks are for use in a relaxation oscil-lator such as the circuit is shown in the following figure.J1–15 N.C.b b J1–16 CLKI System clock input toXChecker Cable to becontrolled and outputon CLKO. Connects totiepoint J3–2.J1–17 RST Connects to jumperJ5. If connected,allows XCheckerCable to provide aReset input (same aspressing Resetbutton).J1–18 CLKO System clock outputcontrolled byXChecker Cable; usedto single-step or burstclocks to the XC3020A.Connects to tiepointJ3–3.a. Denotes pins supported by the Parallel Cable IIIb. No pin connectionTable 3-7 XChecker/Parallel Cable III Connector J1Pin Name Function Pin Name Function
