96 www.xilinx.com Virtex-6 FPGA GTH Transceivers User GuideUG371 (v2.0) February 16, 2010Chapter 3: TransmitterTX Polarity ControlFunctional DescriptionThe GTH transceiver includes a TX polarity control function to invert outgoing data fromthe PCS before serialization and transmission.Ports and AttributesThere are no TX polarity control ports.Table 3-13 defines the TX polarity control attributes.Using TX Polarity ControlIf the TXP/TXN differential traces are swapped on a board, use either the DRP or themanagement interface to set PCS_MISC_CFG_0_LANE[11] register to 1'b1. Theregister is located in:• DRP Address• PCS_MISC_CFG_0_LANE0: 0x5001• PCS_MISC_CFG_0_LANE1: 0x5101• PCS_MISC_CFG_0_LANE2: 0x5201• PCS_MISC_CFG_0_LANE3: 0x5301• Management Interface Address: 0x8001 with MMD Address 0x03• Use the Lane Address setting to specify which GTH lane to accessTable 3-13: TX Polarity Control AttributesAttribute Type DescriptionPCS_MISC_CFG_0_LANE0PCS_MISC_CFG_0_LANE1PCS_MISC_CFG_0_LANE2PCS_MISC_CFG_0_LANE316-bit Hex This attribute sets the polarity and PRBS configuration.[15:12]: Reserved. Use the recommended values from theVirtex-6 FPGA GTH Transceiver Wizard.[11]: Invert TX polarity[10]: RX polarity override enable[9]: RX polarity override value[8]: Reset the PRBS error counter when read[7]: Revert bit order of parallel data to serializer/deserializer TX[6]: Revert bit order of parallel data from serializer/deserializer RX[5:0]: Reserved. Use the recommended values from theVirtex-6 FPGA GTH Transceiver Wizard.