Xilinx Zynq-7000 User Manual
Also see for 7 Series: User guideUser guideUser guideUser guide
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Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1 448UG586 November 30, 2016 www.xilinx.comChapter 3: RLDRAM II and RLDRAM 3 Memory Interface SolutionsCalibration of Read Clock and DataPHASER_IN clocks all ISERDES used to capture read data (DQ) associated with thecorresponding byte group. ICLKDIV is also the write clock for the read data IN_FIFOs. OnePHASER_IN block is associated with a group of 12 I/Os. Each I/O bank in the FPGA has fourPHASER_IN blocks, and hence four read data bytes can be placed in a bank.Implementation DetailsThis stage of read leveling is performed one byte at a time, where the read clock iscenter-aligned to the corresponding read data in that byte group. At the start of this stage,a single write command is issued to address location 0 in each bank of the memory device(eight banks for RLDRAM II and 16 for RLDRAM 3). All banks are used to ensure no matterwhich burst length is selected, the read commands can be issued to ensure read data isreturned back-to-back without any gaps in the data stream.X-Ref Target - Figure 3-52Figure 3-52: Calibration Flow DiagramWriteA-5-0-ForA-5-0-F-9-6-D-2ReadA-5-0-ForA-5-0-F-9-6-D-2ResetMemory InitializationWrite0-F-0-F-0-F-F-0Read0-F-0-F-0-F-F-0Stage 1:Read LevelingStage 2:Edge Advance CalStage 2:Rd Valid CalSimulation RLDRAM IIRecalibrate read pathat each writeadjustmentDifferent patternfrom RTRWriteA-5-0-F-3-C-3-CorA-5-0-F-9-6-D-2ReadA-5-0-ForA-5-0-F-9-6-D-2WriteA-5-0-FReadA-5-0-FResetMemory InitializationWrite0-F-0-F-0-F-F-0Read0-F-0-F-0-F-F-0Stage 1:Read LevelingStage 2:Edge Advance CalStage 2:Rd Valid Cal WriteA-5-0-F-3-C-3-CReadA-5-0-FWrite CalDone?AdjustWrite PathRLDRAM IIIWrites not needed tocalibrate read pathWriteA-5-0-F-9-6-D-2ReadA-5-0-F-9-6-D-2ResetMemory InitializationStage 1:Read Leveling (RTR)Stage 2:Edge Advance CalStage 1:Read Leveling Write0-F-0-F-0-F-F-0Read0-F-0-F-0-F-F-0Write CalDone?AdjustWrite PathReadF-0-F-0-F-0-F-0Turn Off Read TrainingRegisterStage 2:Edge Advance CalWriteA-5-0-F-9-6-D-2ReadA-5-0-F-9-6-D-2Stage 2:Rd Valid Cal WriteA-5-0-F-9-6-D-2ReadA-5-0-F-9-6-D-2Send Feedback |
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