channel 3: slots A4, A8, and A12Processor 2 channel 0: slots B1, B5, and B9channel 1: slots B2, B6, and B10channel 2: slots B3, B7, and B11channel 3: slots B4, B8, and B12Mode-specific guidelinesFour memory channels are allocated to each processor. The allowable configurations depend on thememory mode selected.NOTE: x4 and x8 DRAM based DIMMs can be mixed providing support for RAS features. However,all guidelines for specific RAS features must be followed. x4 DRAM based DIMMs retain SingleDevice Data Correction (SDDC) in memory optimized (independent channel) mode. x8 DRAM basedDIMMs require Advanced ECC mode to gain SDDC.The following sections provide additional slot population guidelines for each mode.Memory optimized (independent channel) modeThis mode supports SDDC only for memory modules that use x4 device width, and the mode does notimpose any specific slot population requirements.Memory configurationThe following table shows the memory configuration for a two processor configuration.NOTE: 2R in the following table indicates dual ranked DIMMs.Table 1. Memory configurationConfiguration SystemCapacity(in GB)DIMMSize (inGB)NumberofDIMMsDIMM Rank,Organization,and FrequencyDIMM Slot PopulationStandard 64 8 8 2R, x8, 1600MT/s,A1, A2, A3, A4B1, B2, B3, B4High capacity 128 16 8 2R, x8, 1600MT/s,A1, A2, A3, A4B1, B2, B3, B4Removing memory modulesWARNING: The memory modules are hot to the touch for some time after the system has beenpowered down. Allow time for the memory modules to cool before handling them. Handle thememory modules by the card edges and avoid touching the components or metallic contacts onthe memory module.34
