Dell PowerEdge 4200 Installation And Troubleshooting Manual

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Contents

Dell PowerEdge 4200 Installation And Troubleshooting Manual Manual pdf 49 page image

Running the System Diagnostics 5-11whether the RAM read and write operations are affectingmore than one memory address location at one time. Thissubtest checks all available RAM.The Comprehensive Memory Test performs an addresscheck as well as the following:• Data pattern checks, to look for RAM bits that arestuck high or low, short-circuited data lines, andsome data pattern problems that are internal to thememory chips• A parity check that verifies the ability of the memorysubsystem to detect errors• A refresh check, to verify that the dynamic RAM(DRAM) is being recharged properlyThe Cache Memory Test confirms the functionality of thecomputer’s cache controller chip and the cache memory.Why Run a RAM Test?Faulty memory can cause a variety of problems that maynot, at first glance, appear to be happening in RAM. If thecomputer is displaying one or more of the followingsymptoms, run the subtests in the RAM Test Group toverify that the memory is not at fault:• A program is not running as usual, or a proven pieceof software appears to malfunction and youconfirm that the software itself is not at fault. (Youcan confirm that the software is functioning properlyby moving it to another computer and running itthere.)• The computer periodically locks up (becomes un-usable and must be rebooted), especially at differentplaces and times in different programs.• You get a parity error (any error message that con-tains the word parity) at any time during operation.These errors are usually accompanied by a referenceto an address—the location of the portion of memorywhere the error occurred—which you should recordon a copy of the Diagnostics Checklist found inAppendix A.• You receive the Memory ECC faultdetected message from the Dell Hardware Instru-mentation Package (HIP) server managementprogram. See Chapter 3, “Messages and Codes,” formore information on this program.System Set Test GroupThe subtests in the System Set Test Group check thecomputer’s basic system board components and verifytheir related functions.SubtestsThe subtests that constitute the System Set Test Groupand the computer functions they confirm follow:• CMOS Confidence TestChecks the NVRAM for accessibility and reliabilityof data storage by performing a data pattern checkand verifying the uniqueness of memory addresses.• EISA Configuration Memory TestVerifies the accessibility and reliability of the RAMon the Extended Industry-Standard Architecture(EISA) Configuration RAM chip, which stores theEISA hardware configuration information. On sys-tems without flash RAM, performs a data patternand address uniqueness test.• DMA Controller TestTests the direct memory access (DMA) controllerand verifies the correct operation of its page andchannel registers by writing patterns to the registers.• Real-Time Clock TestConfirms the functionality and accuracy of the com-puter’s real-time clock (RTC).• System Timers TestChecks the timers used by the microprocessor forevent counting, frequency generation, and otherfunctions. Only the functions that can be activatedby software are tested.• Interrupt Controller TestGenerates an interrupt on each interrupt request(IRQ) line to verify that devices using that line cancommunicate with the microprocessor and that theinterrupt controllers send the correct memoryaddresses to the microprocessor.• Apic TestTests that the procedure used to boot your system isable to properly receive interrupts from the input/