Eaton XN300 Manual

Also see for XN300: Manual Instruction manual

35 Counter module XN-322-1CNT-8DIO35.6 Memory layout295 XN300 slice modules 02/24 MN050002EN Eaton.com0x40F4(READ)– 0x9xx1SUB 011 SystemClock Pulse frequency (System Clock)Pulse frequency in MHz0x00170x40F5 – – 2 CounterValueSDO Counter value as acyclical access (16-bit incrementalencoder counter value)0x00180x40F6 – 0x8xxASUB 021 SignalConfigIncremental encoder configurationregisterBit 0 -1 reserved 0x001ABit 2 Inverted logic for R zero-positionevaluationBit 3 Inverted logic for B phase evalua-tionBit 5-4 Bitn+1BitnSignal analysis0 0 Off0 1 X1 encoding1 0 X2 encoding1 1 X4 encodingBit 6 -7 reserved0x40F7 – 0x6xxASUB 011 EncoderStatusSDOIncremental encoder statusregister(acyclical access)Bit 0 -3 reserved 0x001BBit 4 Zero position presentBit 5 Zero position has been crossed;Bit 5 will be automatically resetafter the register is read.Bit 6-7 reserved0x40F8 – 0x6xx4SUB 032 LatchValueSDO Stored counter value as acyclical access (stored 16-bitincremental encoder counter value)This register contains the counter value stored by a latchpulse. The input that triggers this action must be config-ured accordingly.0x001CCANObjectIndexDefaultCANMappingEtherCAT ObjectIndexSize(byte)Local I/OdescriptionDescriptionbits StatusBitn+1StatusBitnWhat the statemeansLocal I/Oaddresses