NXP Semiconductors i.MX 6Dual Reference Manual

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ERR007805Chip Errata for the i.MX 6Dual/6Quad and i.MX 6DualPlus/6QuadPlus, Rev. 6.1, 06/2016NXP Semiconductors 125Description:When the I2C module is programmed to operate at the maximum clock speed of 400 kHz (asdefined by the I2C spec), the SCL clock low period violates the I2C spec of 1.3 uS min. The userneeds to reduce the clock speed to get the SCL low time to meet the 1.3us I2C minimum required.This behavior means the SoC is not compliant to the I2C spec at 400 kHz.Projected Impact:No failures have been observed when operating at 400 kHz. This erratum only represents aviolation of the I2C specification for the SCL low period.Workarounds:In order to exactly meet the clock low period requirement at fast speed mode, SCL must beconfigured to 384 KHz or less.The following clock configuration meets the I2C specification requirements for SCL low fori.MX 6 products:• I2C parent clock PERCLK_ROOT = 24 M OSC• perclk_podf = 1• PERCLK_ROOT = 24M OSC/perclk_podf = 24 MHz• I2C_IFDR = 0x2A• I2C clock frequency = 24 MHz/64 = 375 kHzProposed Solution:No fix scheduledLinux BSP Status:Software workaround not implemented in Linux BSP. Functionality or mode of operation in whichthe erratum may manifest itself is not used.The BSP configures the I2C frequency to 375 kHz bydefault.ERR007805 I2C: When the I2C clock speed is configured for 400 kHz, the SCL lowperiod violates the I2C specification