16 www.xilinx.com Virtex-4 FPGA Configuration User GuideUG071 (v1.12) June 2, 2017Chapter 1: Configuration Overview RFor power-up, the V CCINT power pins must be supplied with a 1.2V source. None of theI/O voltage supplies (V CCO ), except V CCO_0 (V CC_CONFIG), need to be powered forVirtex-4 configuration in JTAG or serial modes. Table 1-3 shows the power suppliesrequired for configuration; for recommended operating conditions, see Table 2 of theVirtex-4 FPGA Data Sheet. Table 41 of the Virtex-4 FPGA Data Sheet shows the configurationpower-up timing parameters. Table 7-1 shows the number of frames per Virtex-4 device.V CCINT should rise monotonically within the specified ramp rate. If this is not possible,delay configuration by holding the INIT_B pin or the PROGRAM_B pin Low (see“Delaying Configuration”) while the system power reaches VPOR .The configuration logic power input (V CC_CONFIG ) and the auxiliary voltage input(V CCAUX ) are used as a logic input to the Power-On-Reset (POR) circuitry. If either of thesevoltage planes dips below the specified level, POR can trigger.Clear Configuration Memory (Step 2, Initialization)Table 1-3: Power Supplies Required for ConfigurationPin Name DescriptionVCCINT Internal core voltage relative to GND.VBATT (1) Encryption Key battery supply.VCC_CONFIG Configuration output supply voltage (also known as VCCO_0)VCCAUX Auxiliary power input for configuration logic and other FPGA functions.Notes:1. V BATT is required only when using bitstream encryption.Figure 1-3: Device Power-Up TimingTug071_03_073007V CC T PORT PLT ICCKPROGRAM_BINIT_BCCLK Output or InputVALIDM0, M1, M2*(Required)*Can be either 0 or 1, but must not toggle during and after configuration.Figure 1-4: Initialization (Step 2)DevicePower-UpSample ModePins Synchronization Device IDCheck CRC CheckClearConfigurationMemoryStartupSequenceLoadConfigurationDataStart Finishug071_04_122105BitstreamLoadingSteps1 2 3 4 5 6 7 8
