8.9.7.3 Logic diagramANSI08000466-3-en.vsdOperation=EnabledBLK1Inverse timeselectedInverseDT timeselectedPU_ST1TRST1ANDORBLOCKaba>bNegative sequence currentI2-1>00-t1ANSI08000466 V3 ENFigure 111: Simplified logic diagram for step 1 of Negative sequence timeovercurrent protection for machines (NS2PTOC, 46I2)Step 2 for Negative sequence time overcurrent protection for machines (NS2PTOC,46I2) is similar to step 1 above except that it lacks the inverse characteristic.PU_ST1PICKUPORORPU_ST2TRST2TRST1ALARMTRIPANSI09000690-3-en.vsd00-tAlarmANSI09000690 V3 ENFigure 112: Simplified logic diagram for the PICKUP, ALARM and TRIP signals forNS2PTOC (46I2)8.9.8 Technical dataTable 129:NS2PTOC (46I2) technical dataFunction Range or value AccuracyOperate value, step 1and 2, negative sequenceovercurrent(3-500)% ofIBase ± 1.0% of In at I < In± 1.0% of I at I > InReset ratio, step 1 and 2 >95% -Operate time, pickup 30 ms typically at 0 to 2 x Iset20 ms typically at 0 to 10 x Iset-Reset time, pickup 40 ms typically at 2 to 0 x Iset -Table continues on next page1MRK 502 043-UUS B Section 8Current protection243Technical Manual
