GE Multilin D30 Line Distance Protection System 3-353 HARDWARE 3.3 DIRECT INPUT/OUTPUT COMMUNICATIONS33.3.8 IEEE C37.94 INTERFACEThe UR-series IEEE C37.94 communication modules (modules types 76, and 77) are designed to interface with IEEEC37.94 compliant digital multiplexers or an IEEE C37.94 compliant interface converter for use with direct input and outputapplications for firmware revisions 3.30 and higher. The IEEE C37.94 standard defines a point-to-point optical link for syn-chronous data between a multiplexer and a teleprotection device. This data is typically 64 kbps, but the standard providesfor speeds up to 64n kbps, where n = 1, 2,…, 12. The UR-series C37.94 communication modules are either 64 kbps (with nfixed at 1) for 128 kbps (with n fixed at 2). The frame is a valid International Telecommunications Union (ITU-T) recom-mended G.704 pattern from the standpoint of framing and data rate. The frame is 256 bits and is repeated at a frame rate of8000 Hz, with a resultant bit rate of 2048 kbps.The specifications for the module are as follows:.• IEEE standard: C37.94 for 2 64 kbps optical fiber interface (for 76 and 77 modules).• Fiber optic cable type: 50 mm or 62.5 mm core diameter optical fiber.• Fiber optic mode: multi-mode.• Fiber optic cable length: up to 2 km.• Fiber optic connector: type ST.• Wavelength: 830 ±40 nm.• Connection: as per all fiber optic connections, a Tx to Rx connection is required.The UR-series C37.94 communication module can be connected directly to any compliant digital multiplexer that supportsthe IEEE C37.94 standard as shown below.The UR-series C37.94 communication module can be connected to the electrical interface (G.703, RS422, or X.21) of anon-compliant digital multiplexer via an optical-to-electrical interface converter that supports the IEEE C37.94 standard, asshown below.The UR-series C37.94 communication module has six (6) switches that are used to set the clock configuration. The func-tions of these control switches is shown below.For the internal timing mode, the system clock is generated internally. therefore, the timing switch selection should be inter-nal timing for relay 1 and loop timed for relay 2. There must be only one timing source configured.842753A1.CDR
