Contents - Preface
- Table Of Contents
- Table Of Contents
- Table Of Contents
- Table Of Contents
- Table Of Contents
- Table Of Contents
- Table Of Contents
- Table Of Contents
- Chapter 1 Introduction
- Device Features
- Applications
- Pin Configuration (Top View)
- Function Blocks
- On-chip units
- Chapter 2 Pin Functions
- Pin Status
- Description of Pin Functions
- Pin I/O Circuits and Recommended Connection of Unused Pins
- Noise Suppression
- Chapter 3 CPU Functions
- CPU Register Set
- Program register set
- System register set
- Floating point arithmetic unit register set
- Operating Modes
- Operation mode specification
- Address Space
- Images
- Wrap-around of CPU address space
- Memory map
- Areas
- Peripheral I/O registers list
- Programmable peripheral I/O area
- Specific registers
- System wait control register (VSWC)
- Cautions
- Chapter 4 Bus Control Function (μPD70F3187 only)
- Memory Block Function
- Chip select control function
- Bus Cycle Type Control Function
- Bus cycle type configuration
- Bus Access
- Bus sizing function
- Endian control function
- Bus width
- Wait Function
- Idle State Insertion Function
- Bus Priority Order
- Boundary Operation Conditions
- Chapter 5 Memory Access Control Function (μPD70F3187 only)
- SRAM connection
- SRAM, external ROM, external I/O access
- Chapter 6 DMA Functions (DMA Controller)
- Control Registers
- DMA Channel Priorities
- DMA transfer of PWM timer reload (TMR0, TMR1)
- DMA transfer of serial interfaces
- Forcible termination of DMA transfer
- DMA Interrupt Function
- Chapter 7 Interrupt/Exception Processing Function
- Non-maskable Interrupt
- Operation
- Restore
- Non-maskable interrupt status flag (NP)
- Maskable Interrupts
- Priorities of maskable interrupts
- Interrupt control register (PICn)
- Interrupt mask registers 0 to 6 (IMR0 to IMR6)
- In-service priority register (ISPR)
- Maskable interrupt status flag (ID)
- Interrupt trigger mode selection
- Software Exception
- Exception status flag (EP)
- Exception Trap
- Periods in Which CPU Does Not Acknowledge Interrupts
- Chapter 8 Clock Generator
- Power Save Control
- HALT mode
- Chapter 9 16-Bit Timer/Event Counter P
- Configuration
- Interval timer mode (TPnMD2 to TPnMD0 = 000B)
- External event count mode (TPnMD2 to TPnMD0 = 001B)
- External trigger pulse output mode (TPnMD2 to TPnMD0 = 010B)
- One-shot pulse mode (TPnMD2 to TPnMD0 = 011B)
- PWM mode (TPnMD2 to TPnMD0 = 100B)
- Free-running mode (TPnMD2 to TPnMD0 = 101B)
- Pulse width measurement mode (TPnMD2 to TPnMD0 = 110B)
- Counter synchronous operation function
- Features
- Basic Operation
- Compare register rewrite operation
- List of outputs in each mode
- Match Interrupts
- Compare match interrupt related cautions
- Flags
- Normal phase/inverted phase simultaneous active detection flag
- Reload hold flag
- Interrupt Thinning Out Function
- Operation of interrupt thinning out function
- Operation examples when peak interrupts and valley interrupts occur alternately
- Interrupt thinning out function during counter saw tooth wave operation
- A/D Conversion Trigger Function
- A/D conversion trigger operation
- Error Interrupts
- Operation in Each Mode
- Chapter 10 16-bit Inverter Timer/Counter R
- External event count mode
- External trigger pulse output mode (TMR1 only)
- One-shot pulse mode
- PWM mode
- Free-running mode
- Pulse width measurement mode (TMR1 only)
- Triangular wave PWM mode
- High-accuracy T-PWM mode
- PWM mode with dead time
- Method for writing to compare register
- External trigger pulse output mode
- Pulse width measurement mode
- Encoder count function
- Offset trigger generation mode
- Timer (TMENC10) (μPD70F3187 only)
- Basic Configuration
- Operation in general-purpose timer mode
- Operation in UDC mode
- Supplementary Description of Internal Operation
- Clearing of count value upon occurrence of compare match
- Interrupt signal output upon compare match
- Chapter 13 Auxiliary Frequency Output Function (AFO)
- Chapter 14 A/D Converter
- Operation mode and trigger mode
- Operation in A/D Trigger Mode
- Scan mode operations
- Operation in Timer Trigger Mode
- Scan mode operation
- Operation in External Trigger Mode
- Precautions
- Chapter 15 Asynchronous Serial Interface C (UARTC)
- Interrupt Requests
- SBF transmission/reception format
- SBF transmit operation
- SBF receive operation
- UART transmit operation
- Continuous transmit operation
- UART receive operation
- Receive error
- Parity types and operations
- Receive data noise filter
- Dedicated Baud Rate Generator
- Baud rate
- Baud rate setting example
- Allowable baud rate range during reception
- Baud rate during continuous transmission
- Single transfer mode (master mode, transmission mode)
- Single transfer mode (master mode, reception mode)
- Continuous mode (master mode, transmission/reception mode)
- Continuous mode (master mode, transmission mode)
- Continuous mode (master mode, reception mode)
- Continuous reception mode (error)
- Continuous mode (slave mode, transmission/reception mode)
- Continuous mode (slave mode, reception mode)
- Clock timing
- Output Pins
- Operation Flow
- Baud Rate Generator
- Baud rate generation
- Dedicated Baud Rate Generator 3n (BRG3n)
- Function of CSI data buffer register (CSIBUFn)
- Data transfer direction specification function
- Transfer data length changing function
- Function to select serial clock and data phase
- Master mode
- Slave mode
- Transfer clock selection function
- Consecutive mode
- Transmission mode
- Delay control of transmission/reception completion interrupt (INTC3n)
- Transfer wait function
- CSIBUFn overflow interrupt signal (INTC3nOVF)
- Operating Procedures
- Single mode (master mode, reception mode)
- Single mode (master mode, transmission/reception mode)
- Single mode (slave mode, transmission mode)
- Single mode (slave mode, reception mode)
- Single mode (slave mode, transmission/reception mode)
- Consecutive mode (master mode, transmission mode)
- Consecutive mode (master mode, reception mode)
- Consecutive mode (master mode, transmission/reception mode)
- Consecutive mode (slave mode, transmission mode)
- Consecutive mode (slave mode, reception mode)
- Consecutive mode (in slave mode and transmission/reception mode)
- Overview of functions
- CAN Protocol
- Frame types
- Error frame
- Overload frame
- Functions
- Multi masters
- Baud rate control function
- Connection with Target System
- Internal Registers of CAN Controller
- CAN Controller configuration
- CAN registers overview
- Register bit configuration
- Bit Set/Clear Function
- CAN Controller Initialization
- Transition from Initialization Mode to Operation Mode
- Resetting error counter CnERC of CAN module
- Message Reception
- Receive history list function
- Mask function
- Multi buffer receive block function
- Remote frame reception
- Message Transmission
- Transmit history list function
- Automatic block transmission (ABT)
- Transmission abort process
- Remote frame transmission
- Power Saving Modes
- CAN stop mode
- Example of using power saving modes
- Interrupt Function
- Diagnosis Functions and Special Operational Modes
- Single-shot mode
- Receive/Transmit Operation in Each Operation Mode
- Time Stamp Function
- Baud Rate Settings
- Representative examples of baud rate settings
- Operation of CAN Controller
- Port Configuration
- Function of each port
- Port types
- Peripheral registers of I/O ports
- Peripheral registers of valid edge control
- Port Pin Functions
- Port 1
- Port 2
- Port 3
- Port 4
- Port 5
- Port 6
- Port 7
- Port 8
- Port 9
- Port 10
- Port AL
- Port AH
- Port DL
- Port DH
- Port CS
- Port CT
- Port CM
- Port CD
- Noise Elimination
- Chapter 21 Reset Function
- Chapter 22 Internal RAM Parity Check Function
- Chapter 23 On-Chip Debug Function (OCD)
- Connection with N-Wire Type Emulator
- Chapter 24 Flash Memory
- Memory Configuration
- Functional Outline
- Rewriting by Dedicated Flash Programmer
- Communication mode
- Flash memory control
- Selection of communication mode
- Communication commands
- Pin connection
- Rewriting by Self Programming
- Chapter 25 Electrical Specifications
- General Characteristics
- Oscillator characteristics
- DC Characteristics
- AC Characteristics
- External asynchronous memory access read timing
- External asynchronous memory access write timing
- Reset Timing (Power Up/Down Sequence)
- Interrupt timing
- Peripheral Characteristics
- Serial interface characteristics
- A/D Converter Characteristics
- Flash Programming Characteristics
- Chapter 26 Package Drawings
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14 User’s Manual U16580EE3V1UD0020.3.17 Port CT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95520.3.18 Port CM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95820.3.19 Port CD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96120.4 Noise Elimination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 965Chapter 21 Reset Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97121.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97121.2 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97121.3 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 972Chapter 22 Internal RAM Parity Check Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97322.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97322.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97322.3 Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 974Chapter 23 On-Chip Debug Function (OCD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97723.1 Function Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97723.1.1 On-chip debug unit type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97723.1.2 Debug function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97723.2 Connection with N-Wire Type Emulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97923.2.1 KEL connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97923.3 Precautions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 983Chapter 24 Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98524.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98524.2 Memory Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98624.3 Functional Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98824.4 Rewriting by Dedicated Flash Programmer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99124.4.1 Programming environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99124.4.2 Communication mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99224.4.3 Flash memory control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99524.4.4 Selection of communication mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99624.4.5 Communication commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99724.4.6 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99824.5 Rewriting by Self Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100324.5.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100324.5.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1004Chapter 25 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100725.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100725.2 General Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100825.2.1 Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100825.2.2 Operating conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100825.2.3 Oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100925.3 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101025.4 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101125.4.1 External asynchronous memory access read timing . . . . . . . . . . . . . . . . . . . 101225.4.2 External asynchronous memory access write timing . . . . . . . . . . . . . . . . . . . 101425.4.3 Reset Timing (Power Up/Down Sequence) . . . . . . . . . . . . . . . . . . . . . . . . . . 101625.4.4 Interrupt timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101725.5 Peripheral Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101825.5.1 Timer characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101825.5.2 Serial interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102125.5.3 A/D Converter Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103025.6 Flash Programming Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1031Chapter 26 Package Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1033
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