591Chapter 14 A/D ConverterUser’s Manual U16580EE3V1UD0014.5 Operation in A/D Trigger ModeWhen the ADCEn bit of the ADMn0 register is set to 1, A/D conversion is started.14.5.1 Select mode operationIn this mode, the analog input specified by the ADMn2 register is A/D converted. The conversion resultsare stored in the ADCRnm register corresponding to the analog input. In the select mode, the 1-buffermode and 4-buffer mode are supported according to the storing method of the A/D conversion results(n = 0, 1), (m = 0 to 9).(1) 1-buffer mode (A/D trigger select: 1 buffer)In this mode, one analog input is A/D converted once. The conversion results are stored in oneADCRn register. The analog input and ADCRn register correspond one to one.Each time an A/D conversion is executed, an A/D conversion end interrupt (INTAD) is generatedand A/D conversion ends. The next conversion operation is repeated, unless the ADCE bit of theADM0 register is cleared to 0.Table 14-3: Correspondence Between Analog Input Pins and ADCRnm Register(A/D Trigger Select: 1 Buffer)This mode is most appropriate for applications in which the results of each first-time A/D conver-sion are read.Figure 14-12: Example of 1-Buffer Mode Operation (A/D Trigger Select: 1 Buffer)<1> The ADCEn bit of ADMn0 register is set to 1 (enable)<2> ANIn2 is A/D converted<3> The conversion result is stored in ADCRn2 register<4> The INTAD interrupt is generatedRemark: n = 0, 1m = 0 to 9Analog Input A/D Conversion Result RegisterANInm ADCRnmANIn0ANIn1ANIn2ANIn3ANIn4ANIn5ANIn6ANIn7ANIn8ANIn9ADCRn0ADCRn1ADCRn2ADCRn3ADCRn4ADCRn5ADCRn6ADCRn7ADCRn8ADCRn9A/D converter(ADCn)ADMn2
