14-23AddressFP0 T32FP0 C10,C14, C16,C32, SL1Name DescriptionsDT90052 DT9052 High-speed countercontrol flagA value can be written with F0 (MV) instructionto reset the high-speed counter, disablecounting, stop high-speed counter instruction(F168), and clear the high-speed counter.Control code settingSoftware is not reset: H0 (0000)Perform software reset: H1 (0001)Disable count: H2 (0010)Disable hardware reset: H4 (0100)Stop pulse output (clear instruction): H8 (1000)Perform software reset and stop pulse output:H9 (1001)The 16 bits of DT9052/DT90052 are allocated ingroups of four to high-speed channels 0 to 3 asshown below.A hardware reset disable is only effective whenusing the reset input (X2 and X5). In all othercases it is ignored.When using pulse output, a hardware reset inputis equivalent to an home point proximate input.DT90053 - Clock/calendar monitor(hour/minute)Hour and minute data of the clock/calendar arestored here.This data is read-only data; it cannot beoverwritten.