Xilinx ML505 User Manual
Also see for ML505: Quick startQuick startGetting Started Tutorial
                                                            | |
Contents
| 
ML505/ML506/ML507 Evaluation Platform www.xilinx.com 57UG347 (v3.1.1) October 7, 2009RAppendix BProgramming the IDT Clock ChipOverviewThe ML50x evaluation boards feature an Integrated Device Technology (IDT) 3.3VEEPROM Programmable Clock Generator that is pre-programmed at the factory. In theevent the chip programming is changed, the instructions in this appendix show how toreturn the clock chip to its factory default settings using the following equipment:• Xilinx download cable• JTAG flying wiresDownloading to the ML50x Board1. Connect a Xilinx download cable to the board using flying leads connected to jumperJ3 (Figure B-1).2. Click Start → iMPACT.3. Click Boundary Scan.4. Right-click Add Xilinx Device…5. Locate the SVF file (ML50X_clock_setup.svf in the example shown in Figure B-2,page 58) and click Open.Note: The ML50X_clock_setup.svf file is available on the ML50x product page.6. Right-click on the device and select Execute XSVF/SVF.Figure B-1: J3 IDT5V9885 JTAG ConnectorCLK ProgTDIJ31 TMSTCKTDO3.3VGNDUG347_apdx_a_02_020807 |
Related manuals for Xilinx ML505
manualsdatabase
Your AI-powered manual search engine