Xilinx ML505 User Manual

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Contents

Xilinx ML505 User Manual Manual pdf 7 page image

ML505/ML506/ML507 Evaluation Platform www.xilinx.com 7UG347 (v3.1.1) October 7, 2009RPrefaceAbout This GuideThe ML50x evaluation platforms enable designers to investigate and experiment withfeatures of Virtex®-5 FPGAs. This user guide describes the features and operation of theML505 (LXT), ML506 (SXT), and ML507 (FXT) Evaluation Platforms.Guide ContentsThis manual contains the following chapters:• Chapter 1, “ML505/ML506/ML507 Evaluation Platform,”provides details on theboard components• Appendix A, “Board Revisions,” details the differences between board revisions• Appendix B, “Programming the IDT Clock Chip,” shows how to restore the defaultfactory settings for the clock chip on the ML50x boards• Appendix C, “References”Additional DocumentationThe following documents are also available for download athttp://www.xilinx.com/virtex5.• Virtex-5 FPGA Family OverviewThe features and product selection of the Virtex-5 FPGA family are outlined in thisoverview.• Virtex-5 FPGA Data Sheet: DC and Switching CharacteristicsThis data sheet contains the DC and Switching Characteristic specifications for theVirtex-5 FPGA family.• Virtex-5 FPGA User GuideThis user guide includes chapters on:♦ Clocking Resources♦ Clock Management Technology (CMT)♦ Phase-Locked Loops (PLLs)♦ Block RAM and FIFO memory♦ Configurable Logic Blocks (CLBs)♦ SelectIO™ Resources♦ I/O Logic Resources♦ Advanced I/O Logic Resources