ML51Dec. 05, 2018 Page 193 of 401 Rev 1.00ML51 SERIES TECHNICAL REFERENCE MANUALTable 11.4-1 Watchdog Timer-out Interval Under Different Pre-scalarsWDPS.2 WDPS.1 WDPS.0 Clock Divider Scale WDT Time-Out Timing[1]0 0 0 1/1 1.66 ms0 0 1 1/4 6.64 ms0 1 0 1/8 13.31 ms0 1 1 1/16 26.62 ms1 0 0 1/32 53.25 ms1 0 1 1/64 106.66 ms1 1 0 1/128 213.12 ms1 1 1 1/256 426.64 ms[1] This is an approximate value since the deviation of LIRC.Since the limitation of the maxima vaule of WDT timer delay. To up ML51 from idle mode or powerdown mode suggest use WKT function see Chapter 14 SELF WAKE-UP TIMER (WKT).13.1 Time-Out Reset TimerWhen the CONFIG bits WDTEN[3:0] (CONFIG4[7:4]) is not FH, the WDT is initialized as a time-outreset timer. If WDTEN[3:0] is not 5H, the WDT is allowed to continue running after the system entersIdle or Power-down mode. Note that when WDT is initialized as a time-out reset timer, WDTR andWIDPD has no function.FLIRCWDCLRWDPS[2:0]WDT counter(6-bit)clearoverflowWDT Reset512-clockDelay38.4 kHzInternalOscillatorWDTRFWDTF WDT InterruptclearPre-scalar(1/1~1/256)Figure 13.1-1 WDT as A Time-Out Reset TimerAfter the device is powered and it starts to execute software code, the WDT starts countingsimultaneously. The time-out interval is selected by the three bits WDPS[2:0] (WDCON[2:0]). Whenthe selected time-out occurs, the WDT will set the interrupt flag WDTF (WDCON.5). If the WDTinterrupt enable bit EWDT (EIE0.4) and global interrupt enable EA are both set, the WDT interruptroutine will be executed. Meanwhile, an additional 512 clocks of the low-speed internal oscillator
