ML51Dec. 05, 2018 Page 324 of 401 Rev 1.00ML51 SERIES TECHNICAL REFERENCE MANUALPWM0 interrupt 006BH 13 PDMA3 Interrupt 00EBH 29Fault Brake0 interrupt 0073H 1426.2 Enabling InterruptsEach of individual interrupt sources can be enabled or disabled through the use of an associatedinterrupt enable bit in the IE and EIE0 SFR. There is also a global enable bit EA bit (IE.7), which canbe cleared to disable all the interrupts at once. It is set to enable all individually enabled interrupts.Setting the EA bit to logic 0 disables all interrupt sources regardless of the individual interrupt-enablesettings. Note that interrupts which occur when the EA bit is set to logic 0 will be held in a pendingstate, and will not be serviced until the EA bit is set back to logic 1. All interrupt flags that generateinterrupts can also be set via software. Thereby software initiated interrupts can be generated.Note that every interrupts, if enabled, is generated by a setting as logic 1 of its interrupt flag no matterby hardware or software. User should take care of each interrupt flag in its own interrupt serviceroutine (ISR). Most of interrupt flags should be cleared by writing it as logic 0 via software to avoidrecursive interrupt requests.IE – Interrupt Enable (Bit-addressable)7 6 5 4 3 2 1 0EA EADC EBOD ES ET1 EX1 ET0 EX0R/W R/W R/W R/W R/W R/W R/W R/WAddress: A8H, All pages Reset value: 0000 0000bBit Name Description7 EA Enable all interruptThis bit globally enables/disables all interrupts that are individually enabled.0 = All interrupt sources Disabled.1 = Each interrupt Enabled depending on its individual mask setting. Individual interrupts will occur ifenabled.6 EADC Enable ADC interrupt0 = ADC interrupt Disabled.1 = ADC interrupt Enable. When interrupt generated ADCF (ADCCON0.7) set 1.5 EBOD Enable brown-out interrupt0 = Brown-out detection interrupt Disabled.1 = Brown-out detection interrupt Enable. When interrupt generated BOF (BODCON0.3) set 1.4 ES Enable serial port 0 interrupt0 = Serial port 0 interrupt Disabled.1 = Serial port 0 interrupt Enable. When interrupt generated TI (SCON.1) or RI (SCON.0) set 1.
