ML51Dec. 05, 2018 Page 339 of 401 Rev 1.00ML51 SERIES TECHNICAL REFERENCE MANUAL27 IN-APPLICATION-PROGRAMMING (IAP)Unlike RAM’s real-time operation, to update Flash data often takes long time. Furthermore, it is a quitecomplex timing procedure to erase, program, or read Flash data. The ML51 carried out the Flashoperation with convenient mechanism to help user re-programming the Flash content by In-Application-Programming (IAP). IAP is an in-circuit electrical erasure and programming methodthrough software.After IAP enabling by setting IAPEN (CHPCON.0 with TA protected) and setting the enable bit inIAPUEN that allows the target block to be updated, user can easily fill the 16-bit target address inIAPAH and IAPAL, data in IAPFD, and command in IAPCN. Then the IAP is ready to begin by settinga triggering bit IAPGO (IAPTRG.0). Note that IAPTRG is also TA protected. At this moment, the CPUholds the Program Counter and the built-in IAP automation takes over to control the internal charge-pump for high voltage and the detail signal timing. The erase and program time is internally controlleddisregard of the operating voltage and frequency. Nominally, a page-erase time is 5 ms and a byte-program time is 23.5 μs. After IAP action completed, the Program Counter continues to run thefollowing instructions. The IAPGO bit will be automatically cleared. An IAP failure flag, IAPFF(CHPCON.6), can be check whether the previous IAP operation was successful or not. Through thisprogress, user can easily erase, program, and verify the Flash Memory by just taking care of puresoftware.The following registers are related to IAP processing.CONFIG27 6 5 4 3 2 1 0CBODEN CBOV[2:0] BOIAP CBORST - -R/W R/W R/W R/W - -Factory default value: 1111 1111bBit Name Description3 BOIAP Brown-out inhibiting IAPThis bit decide whether IAP erasing or programming is inhibited by brown-out status. This bit isvalid only when brown-out detection is enabled.1 = IAP erasing or programming is inhibited if VDD is lower than VBOD.0 = IAP erasing or programming is allowed under any workable VDD.CHPCON – Chip Control (TA protected)7 6 5 4 3 2 1 0SWRST IAPFF - - - - BS IAPENW R/W - - - - R/W R/WAddress: 9FH, All pages Reset value: Software: 0000 00U0b / others: 0000 00C0b
