ML51Dec. 05, 2018 Page 38 of 401 Rev 1.00ML51 SERIES TECHNICAL REFERENCE MANUAL6 MEMORY ORGANIZATIONA standard 80C51 based microcontroller divides the memory into two different sections, ProgramMemory and Data Memory. The Program Memory is used to store the instruction codes, whereas theData Memory is used to store data or variations during the program execution.The Data Memory occupies a separate address space from Program Memory. In ML51, there are 256bytes of internal scratch-pad RAM. For many applications those need more internal RAM, the ML51provides another on-chip 4\2\1 Kbytes of RAM, which is called XRAM, accessed by MOVX instruction.The whole embedded Flash, functioning as Program Memory, is divided into three blocks: ApplicationROM (APROM) normally for User Code, Loader ROM (LDROM) normally for Boot Code, and CONFIGbytes for hardware initialization. Actually, APROM and LDROM function in the same way but havedifferent size. Each block is accumulated page by page and the page size is 128 bytes. The Flashcontrol unit supports Erase, Program, and Read modes. The external writer tools though specific I/Opins, In-Application-Programming (IAP), or In-System-Programming (ISP) can both perform thesemodes.6.1 Program MemoryThe Program Memory stores the program codes to execute as shown in Figure 6.1-1 ML51 ProgramMemory Map. After any reset, the CPU begins execution from location 0000H.To service the interrupts, the interrupt service locations (called interrupt vectors) should be located inthe Program Memory. Each interrupt is assigned with a fixed location in the Program Memory. Theinterrupt causes the CPU to jump to that location with where it commences execution of the interruptservice routine (ISR). External Interrupt 0, for example, is assigned to location 0003H. If ExternalInterrupt 0 is going to be used, its service routine should begin at location 0003H. If the interrupt is notgoing to be used, its service location is available as general purpose Program Memory.The interrupt service locations are spaced at an interval of eight bytes: 0003H for External Interrupt 0,000BH for Timer 0, 0013H for External Interrupt 1, 001BH for Timer 1, etc. If an interrupt serviceroutine is short enough (as is often the case in control applications), it can reside entirely within the 8-Byte interval. However longer service routines should use a JMP instruction to skip over subsequentinterrupt locations if other interrupts are in use.The ML51 provides two internal Program Memory blocks APROM and LDROM. Although they bothbehave the same as the standard 8051 Program Memory, they play different rules according to theirROM size. The APROM on ML51 can be up to 64 Kbytes. User Code is normally put inside. CPUfetches instructions here for execution. The MOVC instruction can also read this region.
