Xilinx ML50 Series User Manual

ML501 Evaluation Platform www.xilinx.com UG226 (v1.3) November 10, 2008Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDocumentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise,without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reservesthe right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errorscontained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection withtechnical support or assistance that may be provided to you in connection with the Information.THE DOCUMENTATION IS DISCLOSED TO YOU “AS-IS” WITH NO WARRANTY OF ANY KIND. XILINX MAKES NO OTHERWARRANTIES, WHETHER EXPRESS, IMPLIED, OR STATUTORY, REGARDING THE DOCUMENTATION, INCLUDING ANYWARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NONINFRINGEMENT OF THIRD-PARTYRIGHTS. IN NO EVENT WILL XILINX BE LIABLE FOR ANY CONSEQUENTIAL, INDIRECT, EXEMPLARY, SPECIAL, OR INCIDENTALDAMAGES, INCLUDING ANY LOSS OF DATA OR LOST PROFITS, ARISING FROM YOUR USE OF THE DOCUMENTATION.© 2006–2008 Xilinx, Inc. All rights reserved.XILINX, the Xilinx logo, the Brand Window, and other designated brands included herein are trademarks of Xilinx, Inc. PCI, PCI-SIG,PCI EXPRESS, PCIE, PCI-X, PCI HOT PLUG, MINI PCI, EXPRESSMODULE, and the PCI, PCI-X, PCI HOT PLUG, and MINI PC designmarks are trademarks, registered trademarks, and/or service marks of PCI-SIG. All other trademarks are the property of their respectiveowners.Revision HistoryThe following table shows the revision history for this document.Date Version Revision08/30/06 1.0 Initial Xilinx release.09/18/06 1.0.1 Minor typographical edit.03/15/07 1.1• Updated description for “4. Oscillator Sockets,” page 18• Expanded Table 1-4, page 18• Updated Appendix A, “Programming the IDT Clock Chip”11/26/07 1.2 • Added sections on “MIG Compliance,” page 16 and “37. System Monitor,” page 34• Added Appendix B, “References”06/13/08 1.2.1 • Updated links in Appendix B, “References.”• Removed obsolete reference to XAPP445.11/10/08 1.3• Added content to “17. System ACE and CompactFlash Connector,” page 27 and“Configuration Options,” page 36.• Updated Platform Flash memory to Platform Flash PROM throughout.R