36 www.xilinx.com ML501 Evaluation PlatformUG226 (v1.3) November 10, 2008Chapter 1: ML501 Evaluation Platform RConfiguration OptionsThe FPGA on the ML501 Evaluation Platform can be configured by five major devices:• Xilinx download cable (JTAG)• System ACE controller (JTAG)• Platform Flash PROM• Linear Flash memory• SPI Flash memoryThe following section provides an overview of the possible ways the FPGA can beconfigured.JTAG (Xilinx Download Cable and System ACE Controller) ConfigurationThe FPGA, Platform Flash PROM, and CPLD can be configured through the JTAG port.The JTAG chain of the board is illustrated in Figure 1-5.The chain starts at the PC4 connector and goes through the System ACE controller, thePlatform Flash PROM, the FPGA, the CPLD, and an optional extension of the chain to theexpansion card. Jumper J21 determines if the JTAG chain should be extended to theexpansion card.The JTAG chain can be used to program the FPGA and access the FPGA for hardware andsoftware debug. The JTAG chain is also used to program the Platform Flash PROM and theCPLD.The PC4 JTAG connection to the JTAG chain allows a host computer to downloadbitstreams to the FPGA using the iMPACT software tool. PC4 also allows debug tools suchas the ChipScope™ Pro Analyzer or a software debugger to access the FPGA.The System ACE controller can also program the FPGA through the JTAG port. Using aninserted CompactFlash card, configuration information can be stored and played out tothe FPGA. The System ACE controller supports up to eight configuration images that canselected using the three configuration address DIP switches. Under FPGA control, theSystem ACE chip can be instructed to reconfigure to any of the eight configuration images.The configuration mode should be set to 101. Jumper J21 should exclude the expansioncard from the JTAG chain, and switch SW15, pin 8 should be ON to use System ACEconfiguration. When set correctly, the System ACE controller programs the FPGA uponpower-up if a CompactFlash card is present or whenever a CompactFlash card is inserted.Pressing the System ACE reset button also causes the System ACE controller to programthe FPGA if a CompactFlash card is present.Figure 1-5: JTAG ChainUG226_05_082906System ACEControllerTSTTDITSTDOCFGTDOCFGTDIPC4ConnectorFPGAJ21J1TDI123TDOExpansionTDITDOPlatform FlashMemory CPLDTDI TDO TDI TDO