Xilinx ML50 Series User Manual

32 www.xilinx.com ML501 Evaluation PlatformUG226 (v1.3) November 10, 2008Chapter 1: ML501 Evaluation Platform R31. Configuration Address and Mode DIP SwitchesThe 8-position DIP switch (SW15) sets the address and mode of configuration. It alsoenables fallback configuration of the Platform Flash PROM and enables System ACEconfiguration. Table 1-14 lists the function of each switch.Configuration Address [2:0] allows the user to select among multiple configurationimages. For System ACE configuration, up to eight possible configurations can be storedon a CF card. The Platform Flash PROM and Linear Flash can hold up to four separatebitstreams that can be chosen by Configuration Address [2:0].Mode[2:0] selects the FPGA configuration mode according to Table 1-15.32. Encryption Key BatteryAn onboard rechargeable lithium battery is connected to the V BATT pin of the FPGA tohold the encryption key for the FPGA.Table 1-14: Configuration Address DIP Switch SettingsSwitch (SW15) Function1 Config Address [2].2 Config Address [1].3 Config Address [0].4 MODE [2].5 MODE [1].6 MODE [0].7 Platform Flash PROM Fallback (On = Enable, Off = Disable). (1)8System ACE Configuration (On = Enable, Off = Disable). When enabled,the System ACE controller configures the FPGA from the CF cardwhenever a card is inserted or the SYSACE RESET button is pressed.Notes:1. Reserved for future use. Not currently implemented.Table 1-15: Configuration Mode DIP Switch SettingsMode[2:0] Mode000 Master Serial (Platform Flash PROM, up to four configurations)001 SPI (One configuration)010 BPI Up (Parallel NOR Flash, up to four configurations)011 BPI Down (Parallel NOR Flash, up to four configurations)100 Master SelectMAP (Platform Flash PROM, up to four configurations)101 JTAG (PC4, System ACE up to eight configurations)110 Slave SelectMAP (Platform Flash PROM, up to four configurations)111 Slave Serial (Platform Flash PROM, up to four configurations)