Xilinx ML50 Series User Manual

26 www.xilinx.com ML501 Evaluation PlatformUG226 (v1.3) November 10, 2008Chapter 1: ML501 Evaluation Platform R14. IIC Bus with 8-Kb EEPROMAn IIC EEPROM (STMicroelectronics M24C08) is provided on the board to store non-volatile data such as an Ethernet MAC address. The EEPROM is located under theremovable LCD and is not visible in Figure 1-2. The EEPROM write protect is disabled onthe board. IIC bus pull-up resistors are provided on the board.The IIC bus is extended to the expansion connector so that the user can add additional IICdevices and share the IIC controller in the FPGA. If the expansion IIC bus is to be utilized,the user must have additional IIC pull-up resistors present on the expansion card.Bidirectional level shifting transistors allow the expansion card to utilize 2.5V to 5Vsignaling on IIC.15. DVI ConnectorA DVI connector (P7) is present on the board to support an external video monitor. TheDVI circuitry utilizes a Chrontel CH7301C capable of 1600 X 1200 resolution with 24-bitcolor. The video interface chip drives both the digital and analog signals to the DVIconnector. A DVI monitor can be connected to the board directly. A VGA monitor can alsobe connected to the board using the supplied DVI-to-VGA adaptor. The ChrontelCH7301C is controlled by way of the VGA IIC bus.The DVI connector supports the IIC protocol to allow the board to read the monitor’sconfiguration parameters. These parameters can be read by the FPGA using the VGA IICbus.16. PS/2 Mouse and Keyboard PortsThe ML501 Evaluation Platform contains two PS/2 ports: one for a mouse (P5) and theother for a keyboard (P4). Bidirectional level shifting transistors allow the FPGA's1.8V I/O to interface with the 5V I/O of the PS/2 ports. The PS/2 ports on the board arepowered directly by the main 5V power jack, which also powers the rest of the board.Caution! Care must be taken to ensure that the power load of any attached PS/2 devices doesnot overload the AC adapter.