Xilinx ML50 Series User Manual

ML501 Evaluation Platform www.xilinx.com 23UG226 (v1.3) November 10, 2008Detailed DescriptionROther Expansion I/O ConnectorsIn addition to the high-speed I/O paths, additional I/O signals and power connections areavailable to support expansion cards plugged into the ML501 board. Fourteen I/O pinsfrom the general-purpose pushbutton switches and LEDs on the board are connected toexpansion connector J5. This permits additional I/Os to connect to the expansionconnector if the pushbutton switches and LEDs are not used. The connection also allowsthe expansion card to utilize the pushbutton switches and LEDs on the board.The expansion connector also allows the board's JTAG chain to be extended onto theexpansion card by setting jumper J21 accordingly.The IIC bus on the board is also extended onto the expansion connector to allow additionalIIC devices to be bused together. If the expansion IIC bus is to be utilized, the user musthave the IIC pull-up resistors present on the expansion card. Bidirectional level shiftingtransistors allow the expansion card to utilize 2.5V to 5V signaling on the IIC bus.Power supply connections to the expansion connectors provide ground, 2.5V, 3.3V, and 5Vpower pins. If the expansion card draws significant power from the ML501 board, ensurethat the total power draw can be supplied by the board.The ML501 expansion connector is backward compatible with the expansion connectorson the ML40x, ML32x, and ML42x boards, thereby allowing their daughter cards to beused with the ML501 Evaluation Platform. Table 1-11, page 24 summarizes the additionalexpansion I/O connections.56 HDR1_56 Y2658 HDR1_58 P2660 HDR1_60 AA2562 HDR1_62 AC2664 HDR1_64 AB26Table 1-10: Expansion I/O Single-Ended Connections (J6) (Continued)J6 Pin Schematic Net Name FPGA Pin