Xilinx spartan-3a User Manual

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Spartan-3A/3AN FPGA Starter Kit Board User Guidewww.xilinx.com 45UG334 (v1.1) June 19, 2008LCD ControllerRLCD ControllerThe 2 x 16 character LCD has an internal Sitronix ST7066U graphics controller that isfunctionally equivalent with the following devices.• Samsung S6A0069X or KS0066U• Hitachi HD44780• SMOS SED1278Memory MapThe controller has three internal memory regions, each with a specific purpose: DD RAM,CG ROM, and CG RAM. The display must be initialized before accessing any of thesememory regions.DD RAMThe Display Data RAM (DD RAM) stores the character code to be displayed on the screen.Most applications interact primarily with DD RAM. The character code stored in a DDRAM location references a specific character bitmap stored either in the predefined CGROM character set or in the user-defined CG RAM character set.Figure 5-3 shows the default address for the 32 character locations on the display. Theupper line of characters is stored between addresses 0x00 and 0x0F. The second line ofcharacters is stored between addresses 0x40 and 0x4F.Physically, there are 80 total character locations in DD RAM with 40 characters availableper line. Locations 0x10 through 0x27 and 0x50 through 0x67 can be used to store othernon-display data. Alternatively, these locations can also store characters that can only bedisplayed using controller’s display shifting functions.Figure 5-2: UCF Location Constraints for the Character LCDNET "LCD_E" LOC = "AB4" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;NET "LCD_RS" LOC = "Y14" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;NET "LCD_RW" LOC = "W13" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;NET "LCD_DB<7>" LOC = "Y15" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;NET "LCD_DB<6>" LOC = "AB16" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;NET "LCD_DB<5>" LOC = "Y16" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;NET "LCD_DB<4>" LOC = "AA12" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;NET "LCD_DB<3>" LOC = "AB12" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;NET "LCD_DB<2>" LOC = "AB17" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;NET "LCD_DB<1>" LOC = "AB18" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;NET "LCD_DB<0>" LOC = "Y13" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;Character Display Addresses UndisplayedAddresses1 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 … 272 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 … 671 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 … 40Figure 5-3: DD RAM Hexadecimal Addresses (No Display Shifting)