72 www.xilinx.comSpartan-3A/3AN FPGA Starter Kit Board User GuideUG334 (v1.1) June 19, 2008Chapter 9: Analog Capture Circuit RDigital Outputs from Analog InputsThe analog capture circuit converts the analog voltage on VINA or VINB and converts it toa 14-bit digital representation, D[13:0], as expressed by Equation 9-1.Equation 9-1The GAIN is the current setting loaded into the programmable pre-amplifier. The variousallowable settings for GAIN and allowable voltages applied to the VINA and VINB inputsappear in Table 9-2.The reference voltage for the amplifier and the ADC is 1.65V, generated via a voltagedivider shown in Figure 9-2. Consequently, 1.65V is subtracted from the input voltage onVINA or VINB.The maximum range of the ADC is ±1.25V, centered around the reference voltage, 1.65V.Hence, 1.25V appears in the denominator to scale the analog input accordingly.Figure 9-2: Detailed View of Analog Capture CircuitHeader J22SPI_MOSIAMP_CSSPI_SCKAMP_SHDNAMP_DOUT(D16) (AB14)(AA20)(W15)(W6)FPGALTC 6912-1 AMPDAC_REF_ABDAC_REF_CDVINAVINBGNDVCC(3.3V)(3.3V)(3.3V)REF = 1.65VABCS/LDDINSCKSHDNDOUTSPI Control InterfaceA GAIN B GAINSCKCONVSDOSPI Control InterfaceCHANNEL 1 CHANNEL 0AD_CONV(Y6)AD_DOUT(T7)1414LTC 1407A-1 ADCA/DChannel 0A/DChannel 132103210 130 ... 130 ...UG334_c9_02_052407DAC_REF_CD reference voltage is nominally 3.3V.The reference is supplied by the LP3906 adjustable regulator, IC18.The voltage is adjustable using the regulator’s I C interface.2D 13:0[ ] GAIN VIN 1.65V–( )1.25V------------------------------------× 8192×=
