Xilinx spartan-3a User Manual

Also see for Spartan-3A DSP FPGA Series: Datasheet User guide Getting started Technical reference guide User guide

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66 www.xilinx.comSpartan-3A/3AN FPGA Starter Kit Board User GuideUG334 (v1.1) June 19, 2008Chapter 8: PS/2 Mouse/Keyboard Port RThe PS/2 port I/Os should always be set to LVCMOS33 with the PULLUP attribute settrue when used. If this attribute is not set, the voltage on the PS/2 I/Os will be greater thanthe maximum specified permissible amount in the data sheet. These I/Os can be damagedif the bitstream option for unused I/Os is set to float and the FPGA design is not using thePS/2 port pins.Both a PC mouse and keyboard use the two-wire PS/2 serial bus to communicate with ahost device, the FPGA in this case. The PS/2 bus includes both clock and data. Both amouse and keyboard drive the bus with identical signal timings, and both use 11-bit wordsthat include a start, a stop, and an odd parity bit. However, the data packets are organizeddifferently for a mouse and keyboard. Both the keyboard and mouse interfaces allowsbidirectional data transfers. For example, the FPGA host design can illuminate the stateLEDs on the keyboard or change the communicate rate with the mouse.The PS/2 bus timing appears in Table 8-2 and Figure 8-2. The clock and data signals areonly driven when data transfers occur; otherwise they are held in the idle state at a logicHigh. The timing defines signal requirements for mouse-to-host communications andbidirectional keyboard communications. As shown in Figure 8-2, the attached keyboard ormouse writes a bit on the data line when the clock signal is High, and the host reads thedata line when the clock signal is Low.KeyboardThe keyboard uses open-collector drivers so that either the device or the host can drive thetwo-wire bus. If the host never sends data, then the host can use simple input pins.A PS/2-style keyboard uses scan codes to communicate key-press data. Each key has asingle, unique scan code that is sent whenever the corresponding key is pressed. The scancodes for most keys appear in Figure 8-3.If the key is pressed and held, the keyboard repeatedly sends the scan code every 100 ms orso. When a key is released, the keyboard sends an “F0” key-up code, followed by the scancode of the released key. The keyboard sends the same scan code, regardless if a key hasTable 8-2: PS/2 Bus TimingSymbol Parameter Min MaxTCK Clock High or Low Time 30 μs 50 μsTSU Data-to-clock Setup Time 5 μs 25 μsTHLD Clock-to-data Hold Time 5 μs 25 μsFigure 8-2: PS/2 Bus Timing WaveformsTCKTSUTHLDTCKEdge 0 Edge 10CLK (PS2C)DATA (PS2D)'0' start bit '1' stop bitUG230_c8_02_021806