254CHAPTER 12 CLOCK OUTPUT CONTROL CIRCUIT12.2 Clock Output Control Circuit ConfigurationThe clock output control circuit consists of the following hardware.Table 12-1. Clock Output Control Circuit ConfigurationItem ConfigurationTimer clock select register 0 (TCL0)Port mode register 3 (PM3)Figure 12-2. Clock Output Control Circuit Block Diagram12.3 Clock Output Function Control RegistersThe following two types of registers are used to control the clock output function.• Timer clock select register 0 (TCL0)• Port mode register 3 (PM3)(1) Timer clock select register 0 (TCL0)This register sets PCL output clock.TCL0 is set with a 1-bit or 8-bit memory manipulation instruction.RESET input sets TCL0 to 00H.Remark Besides setting PCL output clock, TCL0 sets the 16-bit timer register count clock.Control registerInternal Busf XXf XX /2f XX /22f XX /23f XX /24f XX /25f XX /26f XX /27f XTCLOE TCL03 TCL02 TCL01 TCL00 P35Output LatchSynchronizingCircuit4PM35SelectorTimer Clock Select Register 0 Port Mode Register 3PCL /P35
