27LIST OF FIGURES (5/8)Figure No. Title Page16-27 Address Transmission from Master Device to Slave Device (WUP = 1) .......................................... 32516-28 Command Transmission from Master Device to Slave Device ......................................................... 32616-29 Data Transmission from Master Device to Slave Device .................................................................. 32716-30 Data Transmission from Slave Device to Master Device .................................................................. 32816-31 Serial Bus Configuration Example Using 2-Wire Serial I/O Mode .................................................... 33116-32 2-Wire Serial I/O Mode Timings ........................................................................................................ 33416-33 RELT and CMDT Operations ............................................................................................................ 33516-34 SCK0/P27 Pin Configuration ............................................................................................................ 33617-1 Serial Bus Configuration Example Using I 2 C Bus ............................................................................. 33917-2 Serial Interface Channel 0 Block Diagram ........................................................................................ 34117-3 Timer Clock Select Register 3 Format .............................................................................................. 34617-4 Serial Operating Mode Register 0 Format ........................................................................................ 34817-5 Serial Bus Interface Control Register Format ................................................................................... 34917-6 Interrupt Timing Specify Register Format ......................................................................................... 35117-7 3-Wire Serial I/O Mode Timings ........................................................................................................ 35617-8 RELT and CMDT Operations ............................................................................................................ 35617-9 Circuit of Switching in Transfer Bit Order .......................................................................................... 35717-10 Serial Bus Configuration Example Using 2-Wire Serial I/O Mode .................................................... 35817-11 2-Wire Serial I/O Mode Timings ........................................................................................................ 36117-12 RELT and CMDT Operations ............................................................................................................ 36217-13 Example of Serial Bus Configuration Using I2 C Bus ......................................................................... 36317-14 I 2 C Bus Serial Data Transfer Timing ................................................................................................. 36417-15 Start Condition .................................................................................................................................. 36517-16 Address ............................................................................................................................................. 36517-17 Transfer Direction Specification ........................................................................................................ 36517-18 Acknowledge Signal ......................................................................................................................... 36617-19 Stop Condition .................................................................................................................................. 36617-20 Wait Signal ........................................................................................................................................ 36717-21 Pin Configuration .............................................................................................................................. 37217-22 Data Transmission from Master to Slave (Both Master and Slave Selected 9-Clock Wait) ............. 37417-23 Data Transmission from Slave to Master (Both Master and Slave Selected 9-Clock Wait) ............. 37717-24 Start Condition Output ...................................................................................................................... 38017-25 Slave Wait Release (Transmission) .................................................................................................. 38117-26 Slave Wait Release (Reception) ....................................................................................................... 38217-27 SCK0/SCL/P27 Pin Configuration .................................................................................................... 38517-28 SCK0/SCL/P27 Pin Configuration .................................................................................................... 38517-29 Logic Circuit of SCL Signal ............................................................................................................... 38618-1 Serial Interface Channel 1 Block Diagram ........................................................................................ 38918-2 Timer Clock Select Register 3 Format .............................................................................................. 39218-3 Serial Operating Mode Register 1 Format ........................................................................................ 39318-4 Automatic Data Transmit/Receive Control Register Format ............................................................. 394
