303CHAPTER 16 SERIAL INTERFACE CHANNEL 0 (μPD78058F SUBSERIES)RELTCMDTSO0 latchSI0SCK0 1 2 3 4 5 6 7 8DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0SO0 DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0CSIIF0Transfer Start at the Falling Edge of SCK0End of Transfer(2) Communication operationThe 3-wire serial I/O mode is used for data transmission/reception in 8-bit units. Bit-wise data transmission/reception is carried out in synchronization with the serial clock.Shift operation of the serial I/O shift register 0 (SIO0) is carried out at the falling edge of the serial clock (SCK0).The transmitted data is held in the SO0 latch and is output from the SO0 pin. The received data input to theSI0 pin is latched in SIO0 at the rising edge of SCK0.Upon termination of 8-bit transfer, SIO0 operation stops automatically and the interrupt request flag (CSIIF0)is set.Figure 16-7. 3-Wire Serial I/O Mode TimingsThe SO0 pin is a CMOS output pin and outputs current SO0 latch statuses. Thus, the SO0 pin output statuscan be manipulated by setting bit 0 (RELT) and bit 1 (CMDT) of serial bus interface control register (SBIC).However, do not carry out this manipulation during serial transfer.Control the SCK0 pin output level in the output mode (internal system clock mode) by manipulating the P27output latch (refer to 16.4.5 SCK0/P27 pin output manipulation).(3) Other signalsFigure 16-8 shows RELT and CMDT operations.Figure 16-8. RELT and CMDT Operations
