502CHAPTER 21 INTERRUPT AND TEST FUNCTIONSInternal busMKIFTest inputsignalStandbyrelease signal21.5 Test FunctionsWhen a clock timer overflow occurs and when the port 4 falling edge is detected, a corresponding test input flagis set (1) and a standby release signal is generated.Unlike the interrupt function, vector processing is not executed.There are two test input factors as shown in Table 21-5. The basic configuration is shown in Figure 21-18.Table 21-5. Test Input FactorsTest Input FactorsName TriggerINTWT Watch timer overflow InternalINTPT4 Falling edge detection at port 4 ExternalFigure 21-18. Basic Configuration of Test FunctionRemark IF : test input flagMK: test mask flag21.5.1 Registers controlling the test functionThe test function is controlled by the following three registers.• Interrupt request flag register 1L (IF1L)• Interrupt mask flag register 1L (MK1L)• Key return mode register (KRM)The names of the test input flags and test mask flags corresponding to the test input signals are listed in Table21-6.Table 21-6. Flags Corresponding to Test Input SignalsTest Input Signal Name Test Input Flag Test Mask FlagINTWT WTIF WTMKINTPT4 KRIF KRMKInternal/External