Kenwood TS-950S Service Manual

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TS-950S/SDCIRCUIT DESCRIPTION* Standby control and timingStandby control and timing are performed by thecontrol unit (X53-3230-00). The input control signalsinclude the following ;SS: Standby switch. Active low.SS: Inverted SS. Base for producing each tim-ing voltage.CSS: Standby signal to the microprocessor.Active low.ATS —: Standby signal from ANT TUNER.Active high.ESS _: Standby signal from the personal computercontrol. Active high.KEY : Keying signal from the keyer. Active low.KSW_: Signal indicating whether a key is insertedin the key jack. GND: Key is inserted.TX| : Transmission disable signal fram the micro-processor. Low (Disabled.VOXQ: Standby signal from VOX. Active high.The output control signals include the following :CTXB : Signal that generates TXB (transmission 15V). Active high.TXB: Transmission 15 VKYB: Keying signal generated by keying.Active high.CKY : Keying signal with timing. Active high.RXB : 15 V in receive mode. Same timing as in-verted TXB.RBC: Receive control signal with timing. Activelow.1 oa| |ss ite ee| iaaaLe iLi!a a i| || toms|htFig. 15 Basic timing chart for standby1) Manual standby (other than CW)RX to TX switchingOccurs when the standby switch is pressed and theSS line is grounded. If pin 5 (TX!) of the CWT module(X59-3660-00) is hightransmit is possible, Q203 andQ202 in the module turn on and 15 Vis applied to pin 2from the collector of Q202. Voltage SS passes throughpin 5 of IC13 and D16 and is applied to pin 2 of the TRXmodule (X59-3680-00) as CTXB. This signal turns onQ153 and Q152 and generates TXB from pin 5. Thecollector of 0152 goes high, Q154 turns on, Q155 andQ151 turn off, and RXB from collector of Q151 turnsoff.+ CKY generationSS forces pin 2 of IC6 high, and triggers pin 4,the Ainput pin, of C10 one-shot multi-vibrator. The Q out-put is low for 10 ms and then goes high. As a result ofthis pin 3 of iC6 goes low 10 ms after the standbyswitch is pressed. The signal is then applied to pin 11of IC5, and the inverter output is felt on pin 10.The CWB line applied to pin 13 of IC5 is high in theCW mode and is low in other modes. This causes theinverter output on pin 12 to always be high.Pin 5 of IC4 is high during full break-in, turning theanalog switch on. Pin 13 of !C4 is high during semi-break-in, turning the analog switch on. CKY is output10 ms after SS with the same timing from pins 2 and 3of C4 regardless of semi-break-in or full break-in status.The CKY signal is generated, and a bias is applied tothe second transmit mixer. Meanwhile, the signal isapplied to pin 4 of the ALC module (X59-3700-00) viaD17, passed through integration circuit Q251 for wave-form shaping, and matched with the negative ALCsignal to produce the FET gate bias for the transmitterIF.Fig. 16 CKY generation27