TS-950S/SD CIRCUIT DESCRIPTION+ System resetThe power suppiy voltage is detected by the dedi-cated reset |C M51951BML (iC14}._ If the voltage isfound to be low, the IC outputs a RESET signal to theCPU and 1/O to stop operation, and back up the RAM.let4a |M51951B8MLICiy 1C18+Hee RaM, 1/0When the power supply voltage becomes normal (in-cluding power on), the reset is released, the CPU and |/O are initialized after the time constant set by R5 andC18, and operation resumes.CNS-6Sua CPU RES ®as 1C1-28 RESRESETtotReset timeconstantFig. 27 System reset+ Address controlSincePDOtoPD7ofthemainCPUhavemulti-plexedaddressanddatasignals,theaddresssignalisseparated fromthe datasignalbylatchingtheaddresssignalusingtheALEsignalprovided by!C4BY(TC74HC573AF}.PFOtoPF7becomethehigh-orderdata(A8toA15)oftheaddress.The addresssignalofA12toA15isusedasachip selectsignalforeachICby addressdecoderIC5(TC74HC138AF).veoante bY a OFPOS 61 ne. TS +> 06POs 60 ef D8. «05ie o4Pod 8epe 03 24S pata ausP03 sat oS D3= 02a aPpo 55] - ¢ <—+00 ADORESSPET 54b—>— a + —+ ROM CS 0000 ~7FFFPFG 53:CU) pes sal — Ts iespra 51 AG TCTAHCIZGAFPFS =f ma DECODERPF2 49hPFI 46; AQ +4 aw [ily vec PEPEO a7 pe AG Ais Lele vos | yo cS BOOO~ BFFFIICE?ALE 46th ace { art ie vip 1/0 CS 9000~9FRRIVE Ic7)4 ¥ }170 CS BOO ~ AFFFIICE?7 J» 1/0 CS BOG ~ BFFFIIC®)pPO7ECIOG -36 s C000 ~ CFFFIICIONa D000 ~OFFF (V2 1C7)| £000~FFFFIIC3)o7FOR SERVICE MANUALS i 06CONTACT: L 98MAURITRON TECHNICAL SERVICES aWw . D2ww.mauritron.co.uk i o1TEL: 01844 - 351694 °: ADDRESS 8USFAX: 01844 - 352554 4236 Fig.28Separationofaddress anddata,address decodercircuit