Kenwood TS-950S Service Manual

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TS-950S/SDCIRCUIT DESCRIPTION+ Analog signal inputThe main CPU (uPD78C10G-36) incorporates an 8-channei A/D converter, and in addition, has makes useof 1C13 {M84056) for entering 14-channel analog sig-nals. Incoming analog signals are converted to digitavalues, which are used as digital data.IC7 : uPD78C10G-36 (CPU)Port name [Signal name ; Description+ DisplaySince the TS-950 uses a large fluorescent displaytube combined with a meter, a new sub CPU for thedisplay drive has been developed. The sub CPU islocated on the display unit (X54-3080-00)}, and is con-trolled by serial commands from the main CPU.The work load on the main CPU can be decreasedby making the main CPU send display data and controldata to the sub CPU for display as a serial command,since the sub CPU lights the fluorescent display dy-namically.The sub CPU lights the fluorescent display dynami-cally according to the command data from the mainCPU. Since there are 24 grids, inciuding the meter andsub reception frequency, and the display scan speed isnot sufficient to contro! the grids by itself, the grids aredivided and scanned at high speed to avoid flickering.The sub CPU not only drives the display, but alsoperforms other processing, such as repeater subtonesynthesis, beeper tone, LED display, and optional VS-2audio synthesis.The power required to light the display is suppliedby the power supply unit.The dimmer functions by varying the duty cycle ofthe gate array output. A display enable signal is outputfrom the LH pin (CN5-3) of the display unit each timeone segment is displayed. This signal changes theduty cycle continuously with the one-shot multivibratorcontained in NE555P of switch unit (A) (J/10), andchanges the brightness through the gate array.Next dataANO PRM Processor meter voltageANI METI S/RF meter voltageAN2 MET3 ALC/IC meter voltageAN3 RWM Reflected wave meter voltageAN4 SLH Slope tune high cut amount voltageANS SLL Slope tune low cut amount voltageAN6 VBT VBT amount voltageAN7 - Not usedIC13 : MB4056 (A/D converter)Port name j Signal name DescriptionAO PIT CW pitch variable voltageAl CRU USB carrier point variable voltageA2 CRL LSB carrier point variable voltageA3 CRS Sub receiver carrier point variable voltageA CRW Carrier variable voltageAS - Not usedAG POD1 AT variable capacitor 1 position voltageA7 POD2 AT variable capacitor 2 position voltageTable 9 Analog signal inputAddress9000Main unit,personal computercontrol programFROM : 1C2 cnMBM27C256A-25FDTg000HO 1C6 FLEcxXp109509000VO: 1C7 FBYMB89363B(1/2)ACOOVO: 1c8CXD10950Bo00Encoder : 1C9LZ92K37coo0Encoder : [C10LZ92K37booo1/0 2107MB89363B(1 /2)EoooRAM : 1C3TCSS69APLFFFFFig. 29 Memory mapSUB CPU BUSYSerial data is sent from CN5- 8 FCK to CN5-9 FDT.CN5-7 FLE : The command and number of data items are listedin the command table.CN5-6 FBY : LSB is the first data, and the FLE (JL) pulse isrequired for each byte.When FBY is high after FLE (JL), the next byte can be trans-ferred.Fig. 30 Sub CPU data transfer37