TS-990S4CIRCUIT DESCRIPTION1. Main Receiver Block1-1. Frequency ConfigurationWhile receiving with the main receiver, the 1st IF oper-ates in 8.248MHz double conversion. In modes other thanFM, 24kHz is used as the 2nd IF frequency. The 2nd IF is A/D converted and is applied to the DSP. In FM mode, the 1stIF signal (8.248MHz) is discriminated to an audio signal bythe FM IC. It is then A/D converted and applied to the DSP.1st IF8.248MHz24kHzFM IC455kHz2nd IFAFDividePLLADF4111DDSAD9951PLLADF4111DDSAD9835x2VCOVCOVCXO20MHzPLLADF4001DDSAD9835TCXO19.2MHzTo Scope unitADC/DACDSPAF OUTANTFMexceptFMRX MIX RX MIX1-2. Reference Signal Generator■ With Internal Reference Oscillation Signal Se-lectedThe TCXO (X1) generates a 19.2MHz reference frequen-cy for controlling the local oscillator frequency. The 19.2MHzsignal is applied to the DDS (IC13) via the amplifier (Q10),and approximately 8.4MHz is generated. A signal at approxi-mately 8.4MHz generated by the DDS (IC13) is applied tothe PLL (IC18) via the ceramic filter (CF1). The frequency ofthe PLL (IC18) input is divided inside the PLL (IC18) and isused as a comparison frequency (fø).The VCXO (X2) is a Voltage-Controlled Crystal Oscillatorwhich generates 20MHz. The signal output from the VCXO(X2) is applied to D49 via a buffer (Q78), amplifier (Q79) andLPF, and is frequency-doubled by D49 to generate 40MHz.The 40MHz signal passes through the amplifier (Q82) andLPF, and is applied to the PLL (IC18) with the frequency ofthe signal divided by N in the PLL (IC18). The signal withits frequency divided by N and the fø are compared by thephase comparator inside the PLL and the 40MHz is phase-locked. The phase-locked 40MHz is used as a reference sig-nal for each local oscillator block.Fig. 1 Frequency configuration of the main receiver block■ With External Reference Oscillation Signal Se-lectedThe external 10MHz reference signal supplied fromCN222 on the DC-DC unit (X43-322 A/3) to CN33 on thePLL (MAIN LO) unit (X50-322), is applied to the PLL (IC18)via the buffer (Q5) and AGC amplifier (Q11). When the ex-ternal reference is selected, the external 10MHz is used asa reference signal for the PLL (IC18).■ External Output of 10MHz Reference SignalThe 40MHz which is generated for each local oscillatoris applied to the frequency dividers (IC24 and IC25) via theamplifier (Q81) and LPF, and is frequency-divided by 4 togenerate 10MHz. The obtained 10MHz reference signal issupplied to CN222 on the DC-DC unit via the amplifier (Q51),and is sent from CN220 to the external terminal (REF I/O(10MHz)).■ Frequency AdjustmentFrequency adjustment is made by fine-tuning the approxi-mately 8.4MHz generated from the DDS (IC13).