Programming Examples - 3Power-On ConditionsRefer to the *RST command description in chapter 4 for the power-on conditions of the status registers.Channel Status GroupThe Channel Status registers record signals that indicate abnormal operation of a specific channel of theelectronic load. As shown below, the group consists of a Condition, Event, and Enable register. Theoutputs of the Channel Status registers are logically-ORed into the Channel Summary Registers.Register Command DescriptionCondition STAT:CHAN:COND? A read-only register that holds real-time status of the channelbeing monitored.Event STAT:CHAN:EVEN? A read-only register that latches any condition. It is clearedwhen read.Enable STAT:CHAN:ENAB A read/write register that functions as a mask for enablingspecific bits in the Event register.Channel Summary GroupThe Channel Summary registers summarize the abnormal operation of all channels of the electronic load.As shown below, the group consists of an Event and Enable register. The outputs of the ChannelSummary registers are logically-ORed into the Channel SUMmary bit (2) of the Status Byte register.Register Command DescriptionEvent STAT:CSUM:EVEN? A read-only register that latches any condition from allchannels. It is cleared when read.Enable STAT:CSUM:ENAB A read/write register that functions as a mask for enablingspecific bits in the Enable register.Questionable Status GroupThe Questionable Status registers record signals that indicate abnormal operation of the electronic loadfrom all of the channels. The group consists of the same type of registers as the Channel Status group.The outputs of the Questionable Status group are logically-ORed into the QUEStionable summary bit (3)of the Status Byte register.Register Command DescriptionCondition STAT:QUES:COND? A read-only register that holds real-time logically ORed statusof all channels of the mainframe.Event STAT:QUES:EVEN? A read-only register that latches any condition. It is clearedwhen read.Enable STAT:QUES:ENAB A read/write register that functions as a mask for enablingspecific bits in the Enable register.Standard Event Status GroupThis group consists of an Event register and an Enable register that are programmed by Commoncommands. The Standard Event event register latches events relating to instrument communicationstatus (see figure 3-4). It is a read-only register that is cleared when read. The Standard Event enableregister functions similarly to the enable registers of the Operation and Questionable status groups.43