NuMicro® NUC029LEE/NUC029SEE32-bit Arm® Cortex® -M0 MicrocontrollerAug, 2018 Page 183 of 497 Rev 1.00NUMICRO® NUC029LEE/NUC029SEE TECHNICAL REFERENCE MANUAL6.6.6 Register DescriptionGPIO Port [A/B/C/E/F] Pin I/O Mode Control Register (GPIOx_PMD)Register Offset R/W Description Reset ValueGPIOA_PMD GPIO_BA+0x000 R/W GPIO Port A Pin I/O Mode Control Register 0xXXXX_XXXXGPIOB_PMD GPIO_BA+0x040 R/W GPIO Port B Pin I/O Mode Control Register 0xXXXX_XXXXGPIOC_PMD GPIO_BA+0x080 R/W GPIO Port C Pin I/O Mode Control Register 0xXXXX_XXXXGPIOE_PMD GPIO_BA+0x100 R/W GPIO Port E Pin I/O Mode Control Register 0xXXXX_XXXXGPIOF_PMD GPIO_BA+0x140 R/W GPIO Port F Pin I/O Mode Control Register 0x0000_00XX31 30 29 28 27 26 25 24PMD15 PMD14 PMD13 PMD1223 22 21 20 19 18 17 16PMD11 PMD10 PMD9 PMD815 14 13 12 11 10 9 8PMD7 PMD6 PMD5 PMD47 6 5 4 3 2 1 0PMD3 PMD2 PMD1 PMD0Bits Description[2n+1:2n]n=0,1..15 PMDnGPIOx I/O Pin[N] Mode ControlDetermine each I/O mode of GPIOx pins.00 = GPIO port [n] pin is in Input mode.01 = GPIO port [n] pin is in Push-pull Output mode.10 = GPIO port [n] pin is in Open-drain Output mode.11 = GPIO port [n] pin is in Quasi-bidirectional mode.Note1: The initial value of this field is defined by CIOINI (CONFIG0[10]). If CIOINI is setto 1, the default value is 0xFFFF_FFFF and all pins will be Quasi-bidirectional mode afterchip is powered on. If CIOINI is cleared to 0, the default value is 0x0000_0000 and allpins will be input only mode after chip is powered on.Note2: Max. n = 15 for GPIOA/GPIOB/GPIOC; n = 5 for GPIOE; Max. n = 1 for GPIOF.Note3: The PA.7, PB.12, PC.4, PC.5, PC.12, PC.13 pin is ignored.
